diff options
| author | Daniel Willerud <daniel.willerud@stericsson.com> | 2012-01-13 16:20:03 +0100 |
|---|---|---|
| committer | Samuel Ortiz <sameo@linux.intel.com> | 2012-03-06 18:46:31 +0100 |
| commit | c72fe851df21603cd149320df49064eb2f903707 (patch) | |
| tree | 5b9ad3e93799c1d0973d91918887f4ff56885fd1 /drivers/mfd/db8500-prcmu.c | |
| parent | e536b62095301271d974983044a011c29fcb2ea2 (diff) | |
mfd: Remove db8500-prcmu U8400 legacy
This removes the U8400 legacy from PRCMU and cpufreq drivers.
This platform has no current in-kernel users.
Signed-off-by: Daniel Willerud <daniel.willerud@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd/db8500-prcmu.c')
| -rw-r--r-- | drivers/mfd/db8500-prcmu.c | 26 |
1 files changed, 2 insertions, 24 deletions
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index af8e0efedbe4..b91196368501 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -503,9 +503,6 @@ static const char *hwacc_ret_regulator_name[NUM_HW_ACC] = { /* PLLDIV=12, PLLSW=4 (PLLDDR) */ #define PRCMU_DSI_CLOCK_SETTING 0x0000008C -/* PLLDIV=8, PLLSW=4 (PLLDDR) */ -#define PRCMU_DSI_CLOCK_SETTING_U8400 0x00000088 - /* DPI 50000000 Hz */ #define PRCMU_DPI_CLOCK_SETTING ((1 << PRCMU_CLK_PLL_SW_SHIFT) | \ (16 << PRCMU_CLK_PLL_DIV_SHIFT)) @@ -514,9 +511,6 @@ static const char *hwacc_ret_regulator_name[NUM_HW_ACC] = { /* D=101, N=1, R=4, SELDIV2=0 */ #define PRCMU_PLLDSI_FREQ_SETTING 0x00040165 -/* D=70, N=1, R=3, SELDIV2=0 */ -#define PRCMU_PLLDSI_FREQ_SETTING_U8400 0x00030146 - #define PRCMU_ENABLE_PLLDSI 0x00000001 #define PRCMU_DISABLE_PLLDSI 0x00000000 #define PRCMU_RELEASE_RESET_DSS 0x0000400C @@ -539,19 +533,14 @@ static struct { int db8500_prcmu_enable_dsipll(void) { int i; - unsigned int plldsifreq; /* Clear DSIPLL_RESETN */ writel(PRCMU_RESET_DSIPLL, PRCM_APE_RESETN_CLR); /* Unclamp DSIPLL in/out */ writel(PRCMU_UNCLAMP_DSIPLL, PRCM_MMIP_LS_CLAMP_CLR); - if (prcmu_is_u8400()) - plldsifreq = PRCMU_PLLDSI_FREQ_SETTING_U8400; - else - plldsifreq = PRCMU_PLLDSI_FREQ_SETTING; /* Set DSI PLL FREQ */ - writel(plldsifreq, PRCM_PLLDSI_FREQ); + writel(PRCMU_PLLDSI_FREQ_SETTING, PRCM_PLLDSI_FREQ); writel(PRCMU_DSI_PLLOUT_SEL_SETTING, PRCM_DSI_PLLOUT_SEL); /* Enable Escape clocks */ writel(PRCMU_ENABLE_ESCAPE_CLOCK_DIV, PRCM_DSITVCLK_DIV); @@ -583,12 +572,6 @@ int db8500_prcmu_disable_dsipll(void) int db8500_prcmu_set_display_clocks(void) { unsigned long flags; - unsigned int dsiclk; - - if (prcmu_is_u8400()) - dsiclk = PRCMU_DSI_CLOCK_SETTING_U8400; - else - dsiclk = PRCMU_DSI_CLOCK_SETTING; spin_lock_irqsave(&clk_mgt_lock, flags); @@ -596,7 +579,7 @@ int db8500_prcmu_set_display_clocks(void) while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0) cpu_relax(); - writel(dsiclk, PRCM_HDMICLK_MGT); + writel(PRCMU_DSI_CLOCK_SETTING, PRCM_HDMICLK_MGT); writel(PRCMU_DSI_LP_CLOCK_SETTING, PRCM_TVCLK_MGT); writel(PRCMU_DPI_CLOCK_SETTING, PRCM_LCDCLK_MGT); @@ -642,11 +625,6 @@ bool prcmu_has_arm_maxopp(void) PRCM_AVS_ISMODEENABLE_MASK) == PRCM_AVS_ISMODEENABLE_MASK; } -bool prcmu_is_u8400(void) -{ - return prcmu_version.project_number == PRCMU_PROJECT_ID_8400V2_0; -} - /** * prcmu_get_boot_status - PRCMU boot status checking * Returns: the current PRCMU boot status |