diff options
| author | Rui Feng <rui_feng@realsil.com.cn> | 2017-09-07 16:26:39 +0800 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2017-10-13 10:42:59 +0100 |
| commit | 8275b77a15131673f955f738f0704e1d40a8edae (patch) | |
| tree | 42e42bfdf9efd900d1c0a8ddbd4f8ba7073f67c9 /drivers/mfd/rtsx_pcr.h | |
| parent | 31374972321d1639d1a8bb1213b66688132d103f (diff) | |
mfd: rts5249: Add support for RTS5250S power saving
Enable power saving for RTS5250S as following steps:
1.Set 0xFE58 to enable clock power management.
2.Check cfg space whether support L1SS or not.
3.If support L1SS, set 0xFF03 to free clkreq.
4.When entering idle status, enable aspm
and set parameters for L1SS and LTR.
5.Wnen entering run status, disable aspm
and set parameters for L1SS and LTR.
If entering L1SS mode successfully,
electric current will be below 2mA.
Signed-off-by: Rui Feng <rui_feng@realsil.com.cn>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd/rtsx_pcr.h')
| -rw-r--r-- | drivers/mfd/rtsx_pcr.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/mfd/rtsx_pcr.h b/drivers/mfd/rtsx_pcr.h index 931d1ae3ce32..ec784e04fe20 100644 --- a/drivers/mfd/rtsx_pcr.h +++ b/drivers/mfd/rtsx_pcr.h @@ -32,6 +32,18 @@ #define RTS524A_PME_FORCE_CTL 0xFF78 #define RTS524A_PM_CTRL3 0xFF7E +#define LTR_ACTIVE_LATENCY_DEF 0x883C +#define LTR_IDLE_LATENCY_DEF 0x892C +#define LTR_L1OFF_LATENCY_DEF 0x9003 +#define L1_SNOOZE_DELAY_DEF 1 +#define LTR_L1OFF_SSPWRGATE_5249_DEF 0xAF +#define LTR_L1OFF_SSPWRGATE_5250_DEF 0xFF +#define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF 0xAC +#define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF 0xF8 +#define CMD_TIMEOUT_DEF 100 +#define ASPM_MASK_NEG 0xFC +#define MASK_8_BIT_DEF 0xFF + int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val); int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val); @@ -85,5 +97,7 @@ do { \ /* generic operations */ int rtsx_gops_pm_reset(struct rtsx_pcr *pcr); +int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency); +int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val); #endif |