summaryrefslogtreecommitdiff
path: root/drivers/net/ethernet/intel/igc/igc_tsn.c
diff options
context:
space:
mode:
authorJakub Kicinski <kuba@kernel.org>2023-03-09 23:35:49 -0800
committerJakub Kicinski <kuba@kernel.org>2023-03-09 23:35:49 -0800
commit8fbaced29dc0cef74728a69c4ec8b5534ba542ba (patch)
treecf778af2ae7f94ad97446b5d57bbd3c494663b9e /drivers/net/ethernet/intel/igc/igc_tsn.c
parentfd9c31f834416e3060061dbcb45ababaa25cdfe2 (diff)
parent6cc1b2fd736dbc4c846078459c3c00a0372247da (diff)
Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue
Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2023-03-07 (igc) This series contains updates to igc driver only. Muhammad adds tracking and reporting of QBV config errors. Tan Tee adds support for configuring max SDU for each Tx queue. Sasha removes check for alternate media as only one media type is supported. * '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue: igc: Clean up and optimize watchdog task igc: offload queue max SDU from tc-taprio igc: Add qbv_config_change_errors counter ==================== Link: https://lore.kernel.org/r/20230307221332.3997881-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/ethernet/intel/igc/igc_tsn.c')
-rw-r--r--drivers/net/ethernet/intel/igc/igc_tsn.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c
index a386c8d61dbf..94a2b0dfb54d 100644
--- a/drivers/net/ethernet/intel/igc/igc_tsn.c
+++ b/drivers/net/ethernet/intel/igc/igc_tsn.c
@@ -114,6 +114,7 @@ static int igc_tsn_disable_offload(struct igc_adapter *adapter)
static int igc_tsn_enable_offload(struct igc_adapter *adapter)
{
struct igc_hw *hw = &adapter->hw;
+ bool tsn_mode_reconfig = false;
u32 tqavctrl, baset_l, baset_h;
u32 sec, nsec, cycle;
ktime_t base_time, systim;
@@ -226,6 +227,10 @@ skip_cbs:
}
tqavctrl = rd32(IGC_TQAVCTRL) & ~IGC_TQAVCTRL_FUTSCDDIS;
+
+ if (tqavctrl & IGC_TQAVCTRL_TRANSMIT_MODE_TSN)
+ tsn_mode_reconfig = true;
+
tqavctrl |= IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV;
cycle = adapter->cycle_time;
@@ -239,6 +244,13 @@ skip_cbs:
s64 n = div64_s64(ktime_sub_ns(systim, base_time), cycle);
base_time = ktime_add_ns(base_time, (n + 1) * cycle);
+
+ /* Increase the counter if scheduling into the past while
+ * Gate Control List (GCL) is running.
+ */
+ if ((rd32(IGC_BASET_H) || rd32(IGC_BASET_L)) &&
+ tsn_mode_reconfig)
+ adapter->qbv_config_change_errors++;
} else {
/* According to datasheet section 7.5.2.9.3.3, FutScdDis bit
* has to be configured before the cycle time and base time.