diff options
| author | Dave Jiang <dave.jiang@intel.com> | 2020-11-23 08:36:12 -0700 |
|---|---|---|
| committer | Jon Mason <jdmason@kudzu.us> | 2020-12-06 18:18:03 -0500 |
| commit | 75b6f6487cedd0e4c8e07d68b68b8f85cd352bfe (patch) | |
| tree | 36832eee46f53a6995e5af0b614047f71af9af86 /drivers/ntb/hw/intel/ntb_hw_gen1.h | |
| parent | 91b8246de8590bac89b03b4fd14c61a8b4053b9e (diff) | |
ntb: intel: add Intel NTB LTR vendor support for gen4 NTB
Intel NTB device has custom LTR management that is not compliant with the
PCIe standard. Add support to set LTR status triggered by link status
change.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Diffstat (limited to 'drivers/ntb/hw/intel/ntb_hw_gen1.h')
| -rw-r--r-- | drivers/ntb/hw/intel/ntb_hw_gen1.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/ntb/hw/intel/ntb_hw_gen1.h b/drivers/ntb/hw/intel/ntb_hw_gen1.h index 1b759942d8af..344249fc18d1 100644 --- a/drivers/ntb/hw/intel/ntb_hw_gen1.h +++ b/drivers/ntb/hw/intel/ntb_hw_gen1.h @@ -141,6 +141,7 @@ #define NTB_HWERR_B2BDOORBELL_BIT14 BIT_ULL(2) #define NTB_HWERR_MSIX_VECTOR32_BAD BIT_ULL(3) #define NTB_HWERR_BAR_ALIGN BIT_ULL(4) +#define NTB_HWERR_LTR_BAD BIT_ULL(5) extern struct intel_b2b_addr xeon_b2b_usd_addr; extern struct intel_b2b_addr xeon_b2b_dsd_addr; |