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author | Bjorn Helgaas <bhelgaas@google.com> | 2021-01-26 15:35:03 -0600 |
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committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2021-01-28 10:46:43 +0000 |
commit | cc4a08cd09e4766066eee86ce501fbed42d8ff75 (patch) | |
tree | d422542dd5ea62b529d97c9d2d49aa76815cd4bb /drivers/pci/controller/dwc/pcie-designware-host.c | |
parent | 5ce6697a4460d06d4ea3ec8347974176591e1694 (diff) |
PCI: xgene: Fix CRS SV comment
Configuration Request Retry Status ("CRS") must be supported by all PCIe
devices. CRS Software Visibility is an optional feature that enables a
Root Port to make CRS visible to software by returning a special data value
to complete a config read.
Clarify a comment to say that it is "CRS SV", not "CRS", that can be
enabled.
Link: https://lore.kernel.org/r/20210126213503.2922848-1-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-host.c')
0 files changed, 0 insertions, 0 deletions