diff options
| author | Rob Herring <robh@kernel.org> | 2020-11-05 15:11:59 -0600 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-11-19 10:51:41 +0000 |
| commit | 281f1f99cf3a761b45f611943721dfb1895c68a3 (patch) | |
| tree | a5333f35268b2673d19f73ba5fbf5025abf56b22 /drivers/pci/controller/dwc/pcie-intel-gw.c | |
| parent | 9ca17af552bcd28cb91b6317edd945b4134411fa (diff) | |
PCI: dwc: Detect number of iATU windows
Currently the number of inbound and outbound iATU windows are determined
from DT properties. Unfortunately, there's 'num-viewport' for RC mode
and 'num-ib-windows' and 'num-ob-windows' for EP mode, yet the number of
windows is not mode dependent. Also, 'num-viewport' is not clear whether
that's inbound, outbound or both. We can probably assume it's outbound
windows as that's all RC mode uses.
However, using DT properties isn't really needed as the number of
regions can be detected at runtime by poking the iATU registers. The
basic algorithm is just writing a target address and reading back what
we wrote. In the unrolled ATU case, we have to take care not to go
past the mapped region.
With this, we can drop num_viewport in favor of num_ob_windows instead.
Link: https://lore.kernel.org/r/20201105211159.1814485-17-robh@kernel.org
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-intel-gw.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-intel-gw.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c index 292b9de86532..0cedd1f95f37 100644 --- a/drivers/pci/controller/dwc/pcie-intel-gw.c +++ b/drivers/pci/controller/dwc/pcie-intel-gw.c @@ -58,7 +58,6 @@ struct intel_pcie_soc { unsigned int pcie_ver; - u32 num_viewport; }; struct intel_pcie_port { @@ -400,7 +399,6 @@ static const struct dw_pcie_host_ops intel_pcie_dw_ops = { static const struct intel_pcie_soc pcie_data = { .pcie_ver = 0x520A, - .num_viewport = 3, }; static int intel_pcie_probe(struct platform_device *pdev) @@ -443,12 +441,6 @@ static int intel_pcie_probe(struct platform_device *pdev) return ret; } - /* - * Intel PCIe doesn't configure IO region, so set viewport - * to not perform IO region access. - */ - pci->num_viewport = data->num_viewport; - return 0; } |