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authorYijing Wang <wangyijing@huawei.com>2013-10-10 20:58:11 +0800
committerBjorn Helgaas <bhelgaas@google.com>2013-10-29 13:30:52 -0600
commit869a16157d1ac92a61770be0bc1cf83fbe99d724 (patch)
tree6595952359cfac3ef0ae83c6f5caa97700b2b22a /drivers/pci
parent3ad674d6c6c5724c83f10f422d826420c83536cd (diff)
PCI: Fail MSI/MSI-X initialization if device is not in PCI_D0
Currently, pci_enable_msi() and pci_enable_msix() return success even if the device power state is not D0. However, we don't write the MSI message to the device registers, and the registers will never be updated later. This patch makes pci_enable_msi() and pci_enable_msix() return an error instead. [bhelgaas: changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Acked-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/msi.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index d5f90d6383bc..604265c40853 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -831,7 +831,7 @@ int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
int status, maxvec;
u16 msgctl;
- if (!dev->msi_cap)
+ if (!dev->msi_cap || dev->current_state != PCI_D0)
return -EINVAL;
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
@@ -862,7 +862,7 @@ int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec)
int ret, nvec;
u16 msgctl;
- if (!dev->msi_cap)
+ if (!dev->msi_cap || dev->current_state != PCI_D0)
return -EINVAL;
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
@@ -955,7 +955,7 @@ int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
int status, nr_entries;
int i, j;
- if (!entries || !dev->msix_cap)
+ if (!entries || !dev->msix_cap || dev->current_state != PCI_D0)
return -EINVAL;
status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);