diff options
| author | Shravan Kumar Ramani <shravankr@nvidia.com> | 2024-01-17 05:01:34 -0500 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2024-01-22 12:22:27 +0100 |
| commit | 732c35ce6d4892f7b07cc9aca61a6ad0fd400a26 (patch) | |
| tree | 2fc10201f73a856447b856bf602e5f21d4128d28 /drivers/platform/mellanox | |
| parent | 8cbc756b802605dee3dd40019bd75960772bacf5 (diff) | |
platform/mellanox: mlxbf-pmc: Fix offset calculation for crspace events
The event selector fields for 2 counters are contained in one
32-bit register and the current logic does not account for this.
Fixes: 423c3361855c ("platform/mellanox: mlxbf-pmc: Add support for BlueField-3")
Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
Reviewed-by: David Thompson <davthompson@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Link: https://lore.kernel.org/r/8834cfa496c97c7c2fcebcfca5a2aa007e20ae96.1705485095.git.shravankr@nvidia.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/platform/mellanox')
| -rw-r--r-- | drivers/platform/mellanox/mlxbf-pmc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/platform/mellanox/mlxbf-pmc.c b/drivers/platform/mellanox/mlxbf-pmc.c index 1dd84c7a79de..b1995ac268d7 100644 --- a/drivers/platform/mellanox/mlxbf-pmc.c +++ b/drivers/platform/mellanox/mlxbf-pmc.c @@ -1170,7 +1170,7 @@ static int mlxbf_pmc_program_crspace_counter(int blk_num, uint32_t cnt_num, int ret; addr = pmc->block[blk_num].mmio_base + - (rounddown(cnt_num, 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ); + ((cnt_num / 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ); ret = mlxbf_pmc_readl(addr, &word); if (ret) return ret; @@ -1413,7 +1413,7 @@ static int mlxbf_pmc_read_crspace_event(int blk_num, uint32_t cnt_num, int ret; addr = pmc->block[blk_num].mmio_base + - (rounddown(cnt_num, 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ); + ((cnt_num / 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ); ret = mlxbf_pmc_readl(addr, &word); if (ret) return ret; |