diff options
author | Jason Gunthorpe <jgg@nvidia.com> | 2023-04-04 11:03:24 -0300 |
---|---|---|
committer | Jason Gunthorpe <jgg@nvidia.com> | 2023-04-04 11:04:30 -0300 |
commit | 692d42d411b7db6a76382537fccbee3a12a2bcdb (patch) | |
tree | 24770529cf173188bc5d2d0d9331c0ac723b631e /drivers/platform/x86/intel/pmc/core.c | |
parent | c52159b5be7894540acdc7a35791c0b57097fa4c (diff) | |
parent | 13a0d1ae7ee6b438f5537711a8c60cba00554943 (diff) |
Merge branch 'iommufd/for-rc' into for-next
The following selftest patch requires both the bug fixes and the
improvements of the selftest framework.
* iommufd/for-rc:
iommufd: Do not corrupt the pfn list when doing batch carry
iommufd: Fix unpinning of pages when an access is present
iommufd: Check for uptr overflow
Linux 6.3-rc5
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'drivers/platform/x86/intel/pmc/core.c')
-rw-r--r-- | drivers/platform/x86/intel/pmc/core.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c index 3a15d32d7644..b9591969e0fa 100644 --- a/drivers/platform/x86/intel/pmc/core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -66,7 +66,18 @@ static inline void pmc_core_reg_write(struct pmc_dev *pmcdev, int reg_offset, static inline u64 pmc_core_adjust_slp_s0_step(struct pmc_dev *pmcdev, u32 value) { - return (u64)value * pmcdev->map->slp_s0_res_counter_step; + /* + * ADL PCH does not have the SLP_S0 counter and LPM Residency counters are + * used as a workaround which uses 30.5 usec tick. All other client + * programs have the legacy SLP_S0 residency counter that is using the 122 + * usec tick. + */ + const int lpm_adj_x2 = pmcdev->map->lpm_res_counter_step_x2; + + if (pmcdev->map == &adl_reg_map) + return (u64)value * GET_X2_COUNTER((u64)lpm_adj_x2); + else + return (u64)value * pmcdev->map->slp_s0_res_counter_step; } static int set_etr3(struct pmc_dev *pmcdev) |