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| author | Tim Huang <tim.huang@amd.com> | 2022-10-24 10:32:05 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-11-29 11:03:37 -0500 |
| commit | 18ad18853cf2d8b94cef0112ba94f7a7535a9e89 (patch) | |
| tree | 048406de6e4924364768a8370bf602b7152a580b /drivers/pwm/pwm-omap-dmtimer.c | |
| parent | 9f83e61201bb21957e4993736532edad7a11c7fa (diff) | |
drm/amdgpu/soc21: add mode2 asic reset for SMU IP v13.0.11
Set the default reset method to mode2 for SMU IP v13.0.11
Signed-off-by: Tim Huang <tim.huang@amd.com>
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/pwm/pwm-omap-dmtimer.c')
0 files changed, 0 insertions, 0 deletions