diff options
author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2018-04-17 10:43:57 +0800 |
---|---|---|
committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2018-04-17 10:45:23 +0800 |
commit | 30596ec32e2cd141d73ee8701386887def9e98c0 (patch) | |
tree | c8b0d725c46fd8fa504ec0bf41c92c6ff680b406 /drivers/rtc/rtc-ds1307.c | |
parent | d54e79340ff8d65b6c63ac278158add2fe211fd0 (diff) | |
parent | 60cc43fc888428bb2f18f08997432d426a243338 (diff) |
Back merge 'drm-intel-fixes' into gvt-fixes
Need for 4.17-rc1
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/rtc/rtc-ds1307.c')
-rw-r--r-- | drivers/rtc/rtc-ds1307.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c index 923dde912f60..a13e59edff53 100644 --- a/drivers/rtc/rtc-ds1307.c +++ b/drivers/rtc/rtc-ds1307.c @@ -114,7 +114,6 @@ enum ds_type { # define RX8025_BIT_XST 0x20 struct ds1307 { - struct nvmem_config nvmem_cfg; enum ds_type type; unsigned long flags; #define HAS_NVRAM 0 /* bit 0 == sysfs file active */ @@ -438,8 +437,7 @@ static int ds1307_get_time(struct device *dev, struct rtc_time *t) t->tm_hour, t->tm_mday, t->tm_mon, t->tm_year, t->tm_wday); - /* initial clock setting can be undefined */ - return rtc_valid_tm(t); + return 0; } static int ds1307_set_time(struct device *dev, struct rtc_time *t) @@ -1696,24 +1694,26 @@ read_rtc: } } - if (chip->nvram_size) { - ds1307->nvmem_cfg.name = "ds1307_nvram"; - ds1307->nvmem_cfg.word_size = 1; - ds1307->nvmem_cfg.stride = 1; - ds1307->nvmem_cfg.size = chip->nvram_size; - ds1307->nvmem_cfg.reg_read = ds1307_nvram_read; - ds1307->nvmem_cfg.reg_write = ds1307_nvram_write; - ds1307->nvmem_cfg.priv = ds1307; - - ds1307->rtc->nvmem_config = &ds1307->nvmem_cfg; - ds1307->rtc->nvram_old_abi = true; - } - ds1307->rtc->ops = chip->rtc_ops ?: &ds13xx_rtc_ops; err = rtc_register_device(ds1307->rtc); if (err) return err; + if (chip->nvram_size) { + struct nvmem_config nvmem_cfg = { + .name = "ds1307_nvram", + .word_size = 1, + .stride = 1, + .size = chip->nvram_size, + .reg_read = ds1307_nvram_read, + .reg_write = ds1307_nvram_write, + .priv = ds1307, + }; + + ds1307->rtc->nvram_old_abi = true; + rtc_nvmem_register(ds1307->rtc, &nvmem_cfg); + } + ds1307_hwmon_register(ds1307); ds1307_clks_register(ds1307); |