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authorRoy Pledge <roy.pledge@nxp.com>2018-09-28 11:43:23 +0300
committerLi Yang <leoyang.li@nxp.com>2018-10-05 14:01:46 -0500
commitf1c98ee699314c6512522703b2bc0ed0afd08ad1 (patch)
tree807a9d461fe848d5e6c60b47c12b777d41c10d62 /drivers/soc/fsl
parent06cc59386c9aae8d88efb60af27efea34755c23c (diff)
soc: fsl: qbman: Use last response to determine valid bit
Use the last valid response when determining what valid bit to use next for management commands. This is needed in the case that the portal was previously used by other software like a bootloader or if the kernel is restarted without a hardware reset. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
Diffstat (limited to 'drivers/soc/fsl')
-rw-r--r--drivers/soc/fsl/qbman/qman.c16
1 files changed, 14 insertions, 2 deletions
diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c
index 1897144b9281..b10a5880a468 100644
--- a/drivers/soc/fsl/qbman/qman.c
+++ b/drivers/soc/fsl/qbman/qman.c
@@ -850,12 +850,24 @@ static inline void qm_mr_set_ithresh(struct qm_portal *portal, u8 ithresh)
static inline int qm_mc_init(struct qm_portal *portal)
{
+ u8 rr0, rr1;
struct qm_mc *mc = &portal->mc;
mc->cr = portal->addr.ce + QM_CL_CR;
mc->rr = portal->addr.ce + QM_CL_RR0;
- mc->rridx = (mc->cr->_ncw_verb & QM_MCC_VERB_VBIT)
- ? 0 : 1;
+ /*
+ * The expected valid bit polarity for the next CR command is 0
+ * if RR1 contains a valid response, and is 1 if RR0 contains a
+ * valid response. If both RR contain all 0, this indicates either
+ * that no command has been executed since reset (in which case the
+ * expected valid bit polarity is 1)
+ */
+ rr0 = mc->rr->verb;
+ rr1 = (mc->rr+1)->verb;
+ if ((rr0 == 0 && rr1 == 0) || rr0 != 0)
+ mc->rridx = 1;
+ else
+ mc->rridx = 0;
mc->vbit = mc->rridx ? QM_MCC_VERB_VBIT : 0;
#ifdef CONFIG_FSL_DPAA_CHECKING
mc->state = qman_mc_idle;