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authorWolfram Sang <wsa+renesas@sang-engineering.com>2023-03-07 11:56:40 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2023-03-10 16:31:07 +0100
commitfd9c55c0acac59013dae9f8eedb0e0eb2e82e276 (patch)
tree0e8484a6b1c4e3b9c22e2a0df3a78efc04b1a7cc /drivers/soc/renesas
parentfe15c26ee26efa11741a7b632e9f23b01aca4cc6 (diff)
soc: renesas: rcar-sysc: Remove R-Car H3 ES1.* handling
R-Car H3 ES1.* was only available to an internal development group and needed a lot of quirks and workarounds. These become a maintenance burden now, so our development group decided to remove upstream support and disable booting for this SoC. Public users only have ES2 onwards. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230307105645.5285-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/soc/renesas')
-rw-r--r--drivers/soc/renesas/r8a7795-sysc.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/soc/renesas/r8a7795-sysc.c b/drivers/soc/renesas/r8a7795-sysc.c
index 91074411b8cf..cbe1ff0fc583 100644
--- a/drivers/soc/renesas/r8a7795-sysc.c
+++ b/drivers/soc/renesas/r8a7795-sysc.c
@@ -38,8 +38,6 @@ static struct rcar_sysc_area r8a7795_areas[] __initdata = {
{ "a3vp", 0x340, 0, R8A7795_PD_A3VP, R8A7795_PD_ALWAYS_ON },
{ "cr7", 0x240, 0, R8A7795_PD_CR7, R8A7795_PD_ALWAYS_ON },
{ "a3vc", 0x380, 0, R8A7795_PD_A3VC, R8A7795_PD_ALWAYS_ON },
- /* A2VC0 exists on ES1.x only */
- { "a2vc0", 0x3c0, 0, R8A7795_PD_A2VC0, R8A7795_PD_A3VC },
{ "a2vc1", 0x3c0, 1, R8A7795_PD_A2VC1, R8A7795_PD_A3VC },
{ "3dg-a", 0x100, 0, R8A7795_PD_3DG_A, R8A7795_PD_ALWAYS_ON },
{ "3dg-b", 0x100, 1, R8A7795_PD_3DG_B, R8A7795_PD_3DG_A },
@@ -54,14 +52,10 @@ static struct rcar_sysc_area r8a7795_areas[] __initdata = {
* Fixups for R-Car H3 revisions
*/
-#define HAS_A2VC0 BIT(0) /* Power domain A2VC0 is present */
#define NO_EXTMASK BIT(1) /* Missing SYSCEXTMASK register */
static const struct soc_device_attribute r8a7795_quirks_match[] __initconst = {
{
- .soc_id = "r8a7795", .revision = "ES1.*",
- .data = (void *)(HAS_A2VC0 | NO_EXTMASK),
- }, {
.soc_id = "r8a7795", .revision = "ES2.*",
.data = (void *)(NO_EXTMASK),
},
@@ -77,10 +71,6 @@ static int __init r8a7795_sysc_init(void)
if (attr)
quirks = (uintptr_t)attr->data;
- if (!(quirks & HAS_A2VC0))
- rcar_sysc_nullify(r8a7795_areas, ARRAY_SIZE(r8a7795_areas),
- R8A7795_PD_A2VC0);
-
if (quirks & NO_EXTMASK)
r8a7795_sysc_info.extmask_val = 0;