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authorAmit Kumar Mahapatra via Alsa-devel <alsa-devel@alsa-project.org>2023-03-10 23:02:03 +0530
committerMark Brown <broonie@kernel.org>2023-03-11 12:34:01 +0000
commit9e264f3f85a56cc109cc2d6010a48aa89d5c1ff1 (patch)
treef4625d50e5c6c4190d20daa8cb770f84f51d540b /drivers/spi/spi-npcm-fiu.c
parent21d19e601fd221cd61105286b0b6ec2f9c5a2576 (diff)
spi: Replace all spi->chip_select and spi->cs_gpiod references with function call
Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod members of struct spi_device to be an array. But changing the type of these members to array would break the spi driver functionality. To make the transition smoother introduced four new APIs to get/set the spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and spi->cs_gpiod references with get or set API calls. While adding multi-cs support in further patches the chip_select & cs_gpiod members of the spi_device structure would be converted to arrays & the "idx" parameter of the APIs would be used as array index i.e., spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Acked-by: Heiko Stuebner <heiko@sntech.de> # Rockchip drivers Reviewed-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> # Aspeed driver Reviewed-by: Dhruva Gole <d-gole@ti.com> # SPI Cadence QSPI Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> # spi-stm32-qspi Acked-by: William Zhang <william.zhang@broadcom.com> # bcm63xx-hsspi driver Reviewed-by: Serge Semin <fancer.lancer@gmail.com> # DW SSI part Link: https://lore.kernel.org/r/167847070432.26.15076794204368669839@mailman-core.alsa-project.org Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-npcm-fiu.c')
-rw-r--r--drivers/spi/spi-npcm-fiu.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/spi/spi-npcm-fiu.c b/drivers/spi/spi-npcm-fiu.c
index 8d7698d167ef..eb353561509a 100644
--- a/drivers/spi/spi-npcm-fiu.c
+++ b/drivers/spi/spi-npcm-fiu.c
@@ -288,7 +288,7 @@ static ssize_t npcm_fiu_direct_read(struct spi_mem_dirmap_desc *desc,
{
struct npcm_fiu_spi *fiu =
spi_controller_get_devdata(desc->mem->spi->master);
- struct npcm_fiu_chip *chip = &fiu->chip[desc->mem->spi->chip_select];
+ struct npcm_fiu_chip *chip = &fiu->chip[spi_get_chipselect(desc->mem->spi, 0)];
void __iomem *src = (void __iomem *)(chip->flash_region_mapped_ptr +
offs);
u8 *buf_rx = buf;
@@ -315,7 +315,7 @@ static ssize_t npcm_fiu_direct_write(struct spi_mem_dirmap_desc *desc,
{
struct npcm_fiu_spi *fiu =
spi_controller_get_devdata(desc->mem->spi->master);
- struct npcm_fiu_chip *chip = &fiu->chip[desc->mem->spi->chip_select];
+ struct npcm_fiu_chip *chip = &fiu->chip[spi_get_chipselect(desc->mem->spi, 0)];
void __iomem *dst = (void __iomem *)(chip->flash_region_mapped_ptr +
offs);
const u8 *buf_tx = buf;
@@ -344,7 +344,7 @@ static int npcm_fiu_uma_read(struct spi_mem *mem,
regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CTS,
NPCM_FIU_UMA_CTS_DEV_NUM,
- (mem->spi->chip_select <<
+ (spi_get_chipselect(mem->spi, 0) <<
NPCM_FIU_UMA_CTS_DEV_NUM_SHIFT));
regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CMD,
NPCM_FIU_UMA_CMD_CMD, op->cmd.opcode);
@@ -398,7 +398,7 @@ static int npcm_fiu_uma_write(struct spi_mem *mem,
regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CTS,
NPCM_FIU_UMA_CTS_DEV_NUM,
- (mem->spi->chip_select <<
+ (spi_get_chipselect(mem->spi, 0) <<
NPCM_FIU_UMA_CTS_DEV_NUM_SHIFT));
regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CMD,
@@ -451,7 +451,7 @@ static int npcm_fiu_manualwrite(struct spi_mem *mem,
regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CTS,
NPCM_FIU_UMA_CTS_DEV_NUM,
- (mem->spi->chip_select <<
+ (spi_get_chipselect(mem->spi, 0) <<
NPCM_FIU_UMA_CTS_DEV_NUM_SHIFT));
regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CTS,
NPCM_FIU_UMA_CTS_SW_CS, 0);
@@ -545,7 +545,7 @@ static int npcm_fiu_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
{
struct npcm_fiu_spi *fiu =
spi_controller_get_devdata(mem->spi->master);
- struct npcm_fiu_chip *chip = &fiu->chip[mem->spi->chip_select];
+ struct npcm_fiu_chip *chip = &fiu->chip[spi_get_chipselect(mem->spi, 0)];
int ret = 0;
u8 *buf;
@@ -605,7 +605,7 @@ static int npcm_fiu_dirmap_create(struct spi_mem_dirmap_desc *desc)
{
struct npcm_fiu_spi *fiu =
spi_controller_get_devdata(desc->mem->spi->master);
- struct npcm_fiu_chip *chip = &fiu->chip[desc->mem->spi->chip_select];
+ struct npcm_fiu_chip *chip = &fiu->chip[spi_get_chipselect(desc->mem->spi, 0)];
struct regmap *gcr_regmap;
if (!fiu->res_mem) {
@@ -624,7 +624,7 @@ static int npcm_fiu_dirmap_create(struct spi_mem_dirmap_desc *desc)
chip->flash_region_mapped_ptr =
devm_ioremap(fiu->dev, (fiu->res_mem->start +
(fiu->info->max_map_size *
- desc->mem->spi->chip_select)),
+ spi_get_chipselect(desc->mem->spi, 0))),
(u32)desc->info.length);
if (!chip->flash_region_mapped_ptr) {
dev_warn(fiu->dev, "Error mapping memory region, direct read disabled\n");
@@ -669,9 +669,9 @@ static int npcm_fiu_setup(struct spi_device *spi)
struct npcm_fiu_spi *fiu = spi_controller_get_devdata(ctrl);
struct npcm_fiu_chip *chip;
- chip = &fiu->chip[spi->chip_select];
+ chip = &fiu->chip[spi_get_chipselect(spi, 0)];
chip->fiu = fiu;
- chip->chipselect = spi->chip_select;
+ chip->chipselect = spi_get_chipselect(spi, 0);
chip->clkrate = spi->max_speed_hz;
fiu->clkrate = clk_get_rate(fiu->clk);