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authorYijing Wang <wangyijing@huawei.com>2013-09-09 21:13:07 +0800
committerBjorn Helgaas <bhelgaas@google.com>2013-10-04 14:31:03 -0600
commit9db008d0d963f358c13381e86f5a042579216f06 (patch)
tree06450cae6b2be5dc5223a7d6970e66d410b71f96 /drivers/staging/et131x
parent03078633a6eb86fdb6ea2f40e6352de4b1181bbf (diff)
staging: et131x: Use pci_dev->pcie_mpss and pcie_set_readrq() to simplify code
The PCI core caches the "PCIe Max Payload Size Supported" in pci_dev->pcie_mpss, so use that instead of pcie_capability_read_dword(). Also use pcie_set_readrq() instead of pcie_capability_clear_and_set_word() to simplify code. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Mark Einon <mark.einon@gmail.com>
Diffstat (limited to 'drivers/staging/et131x')
-rw-r--r--drivers/staging/et131x/et131x.c14
1 files changed, 3 insertions, 11 deletions
diff --git a/drivers/staging/et131x/et131x.c b/drivers/staging/et131x/et131x.c
index f73e58f5ef8d..876881d1826e 100644
--- a/drivers/staging/et131x/et131x.c
+++ b/drivers/staging/et131x/et131x.c
@@ -3605,17 +3605,10 @@ static int et131x_pci_init(struct et131x_adapter *adapter,
goto err_out;
}
- /* Let's set up the PORT LOGIC Register. First we need to know what
- * the max_payload_size is
- */
- if (pcie_capability_read_word(pdev, PCI_EXP_DEVCAP, &max_payload)) {
- dev_err(&pdev->dev,
- "Could not read PCI config space for Max Payload Size\n");
- goto err_out;
- }
+ /* Let's set up the PORT LOGIC Register. */
/* Program the Ack/Nak latency and replay timers */
- max_payload &= 0x07;
+ max_payload = pdev->pcie_mpss;
if (max_payload < 2) {
static const u16 acknak[2] = { 0x76, 0xD0 };
@@ -3645,8 +3638,7 @@ static int et131x_pci_init(struct et131x_adapter *adapter,
}
/* Change the max read size to 2k */
- if (pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
- PCI_EXP_DEVCTL_READRQ, 0x4 << 12)) {
+ if (pcie_set_readrq(pdev, 2048)) {
dev_err(&pdev->dev,
"Couldn't change PCI config space for Max read size\n");
goto err_out;