diff options
| author | Gerald Baeza <gerald.baeza@st.com> | 2017-07-13 15:08:30 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-07-30 07:32:32 -0700 |
| commit | 351a762aa8051960695a0f131731518e93b957fa (patch) | |
| tree | 6279043932331bad9e8382d1a4a5c744e5fa23eb /drivers/tty/serial/stm32-usart.c | |
| parent | 270e5a74fe4c78a857d65f1a129d3d77a36b8d58 (diff) | |
serial: stm32: add fifo support
This patch adds fifo mode support for rx and tx.
A fifo configuration is set in each port structure.
Add has_fifo flag to usart configuration to use fifo only when possible.
Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/stm32-usart.c')
| -rw-r--r-- | drivers/tty/serial/stm32-usart.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index 9c4357379b1e..72c0ec145527 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -468,6 +468,8 @@ static int stm32_startup(struct uart_port *port) } val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE; + if (stm32_port->fifoen) + val |= USART_CR1_FIFOEN; stm32_set_bits(port, ofs->cr1, val); return 0; @@ -482,6 +484,8 @@ static void stm32_shutdown(struct uart_port *port) val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE; val |= BIT(cfg->uart_enable_bit); + if (stm32_port->fifoen) + val |= USART_CR1_FIFOEN; stm32_clr_bits(port, ofs->cr1, val); dev_pm_clear_wake_irq(port->dev); @@ -512,6 +516,8 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE; cr1 |= BIT(cfg->uart_enable_bit); + if (stm32_port->fifoen) + cr1 |= USART_CR1_FIFOEN; cr2 = 0; cr3 = 0; @@ -676,6 +682,7 @@ static int stm32_init_port(struct stm32_port *stm32port, port->dev = &pdev->dev; port->irq = platform_get_irq(pdev, 0); stm32port->wakeirq = platform_get_irq(pdev, 1); + stm32port->fifoen = stm32port->info->cfg.has_fifo; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); port->membase = devm_ioremap_resource(&pdev->dev, res); |