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authorYiPeng Chai <YiPeng.Chai@amd.com>2024-10-22 13:42:38 +0800
committerAlex Deucher <alexander.deucher@amd.com>2024-10-24 18:04:34 -0400
commit3d0ffc64188c0573fd3b1b2ba75eb1b35274fc7c (patch)
tree68eaeeffbe4a6ee2f38bde7cf8822bc252c35dea /drivers
parent1cdd67510e54e3832f14a885dbf5858584558650 (diff)
drm/amdgpu: Reduce redundant gpu resets on nbio v7.4
On nbio v7.4, ras controller interrupt and athub interrupt are generated after injecting UE to PCIE, but gpu reset only needs to be triggered once. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index 8d80df94bd8b..a26a9be58eac 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -414,8 +414,7 @@ static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device
/* ras_controller_int is dedicated for nbif ras error,
* not the global interrupt for sync flood
*/
- amdgpu_ras_set_fed(adev, true);
- amdgpu_ras_reset_gpu(adev);
+ amdgpu_ras_global_ras_isr(adev);
}
amdgpu_ras_error_data_fini(&err_data);