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authorShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>2022-02-22 18:39:02 +0530
committerStephen Boyd <sboyd@kernel.org>2022-03-29 10:17:42 -0700
commitd583804c97c5ae7a7eba9c44982adcb106c2d160 (patch)
tree578cb228ca69c0f33eb87403c35b930dd9deae57 /drivers
parentbb7f4b8c1e5c184d8a39c25ce40a73ef6ecba365 (diff)
clk: zynq: trivial warning fix
Fix the below warning WARNING: Missing a blank line after declarations + int enable = !!(fclk_enable & BIT(i - fclk0)); + zynq_clk_register_fclk(i, clk_output_name[i], Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Link: https://lore.kernel.org/r/20220222130903.17235-2-shubhrajyoti.datta@xilinx.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/zynq/clkc.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
index 204b83d911b9..434511dcf5cb 100644
--- a/drivers/clk/zynq/clkc.c
+++ b/drivers/clk/zynq/clkc.c
@@ -349,6 +349,7 @@ static void __init zynq_clk_setup(struct device_node *np)
/* Peripheral clocks */
for (i = fclk0; i <= fclk3; i++) {
int enable = !!(fclk_enable & BIT(i - fclk0));
+
zynq_clk_register_fclk(i, clk_output_name[i],
SLCR_FPGA0_CLK_CTRL + 0x10 * (i - fclk0),
periph_parents, enable);