diff options
| author | Connor Abbott <cwabbott0@gmail.com> | 2024-04-30 11:43:16 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-06-21 00:15:26 -0500 |
| commit | 158ed777e330e9bf6bd592daaf1e860d965ec8b5 (patch) | |
| tree | 42c5f100d291fd2d50deb80c090ccb52c6a5b451 /include/linux/firmware | |
| parent | 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 (diff) | |
firmware: qcom: scm: Add gpu_init_regs call
This will used by drm/msm to initialize GPU registers that Qualcomm's
firmware doesn't make writeable to the kernel.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20240430-a750-raytracing-v3-2-7f57c5ac082d@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'include/linux/firmware')
| -rw-r--r-- | include/linux/firmware/qcom/qcom_scm.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h index aaa19f93ac43..a221a643dc12 100644 --- a/include/linux/firmware/qcom/qcom_scm.h +++ b/include/linux/firmware/qcom/qcom_scm.h @@ -115,6 +115,29 @@ int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, int qcom_scm_lmh_profile_change(u32 profile_id); bool qcom_scm_lmh_dcvsh_available(void); +/* + * Request TZ to program set of access controlled registers necessary + * irrespective of any features + */ +#define QCOM_SCM_GPU_ALWAYS_EN_REQ BIT(0) +/* + * Request TZ to program BCL id to access controlled register when BCL is + * enabled + */ +#define QCOM_SCM_GPU_BCL_EN_REQ BIT(1) +/* + * Request TZ to program set of access controlled register for CLX feature + * when enabled + */ +#define QCOM_SCM_GPU_CLX_EN_REQ BIT(2) +/* + * Request TZ to program tsense ids to access controlled registers for reading + * gpu temperature sensors + */ +#define QCOM_SCM_GPU_TSENSE_EN_REQ BIT(3) + +int qcom_scm_gpu_init_regs(u32 gpu_req); + #ifdef CONFIG_QCOM_QSEECOM int qcom_scm_qseecom_app_get_id(const char *app_name, u32 *app_id); |