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| author | Mikko Perttunen <mperttunen@nvidia.com> | 2023-01-19 15:38:59 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2023-01-26 15:55:38 +0100 |
| commit | 79aad29c7d2d2cd64790115d3a6ebac28c00a8ec (patch) | |
| tree | 4b3748db4d104982f0319a6b3ccb0219eb4df263 /include/linux/fpga/altera-pr-ip-core.h | |
| parent | 3d9057514c37357c1bae8f0fda58297f1780f8db (diff) | |
gpu: host1x: Fix mask for syncpoint increment register
On Tegra186+, the syncpoint ID has 10 bits of space. To allow
using more than 256 syncpoints, fix the mask.
Fixes: 9abdd497cd0a ("gpu: host1x: Tegra234 device data and headers")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/linux/fpga/altera-pr-ip-core.h')
0 files changed, 0 insertions, 0 deletions