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| author | Adam Ford <aford173@gmail.com> | 2020-06-03 10:43:27 -0500 | 
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-06-22 19:04:58 -0700 | 
| commit | f491276a5168598758ea7fc381195e4ba9af39f8 (patch) | |
| tree | 7b256fbddb695856be18d77db61a667f88eeda42 /include/linux/fpga/fpga-bridge.h | |
| parent | b3a9e3b9622ae10064826dccb4f7a52bd88c7407 (diff) | |
clk: vc5: Allow Versaclock driver to support multiple instances
Currently, the Versaclock driver is only expecting one instance and
uses hard-coded names for the various clock names.  Unfortunately,
this is a problem when there is more than one instance of the driver,
because the subsequent instantiations of the driver use the identical
name.  Each clock after the fist fails to load, because the clock
subsystem cannot handle two clocks with identical name.
This patch removes the hard-coded name arrays and uses kasprintf to
assign clock names based on names of their respective node and parent
node which gives each clock a unique identifying name.
For a verasaclock node with a name like:
   versaclock5: versaclock_som@6a
The updated clock names would appear like:
    versaclock_som.mux
       versaclock_som.out0_sel_i2cb
       versaclock_som.pfd
          versaclock_som.pll
             versaclock_som.fod3
                versaclock_som.out4
             versaclock_som.fod2
                versaclock_som.out3
             versaclock_som.fod1
                versaclock_som.out2
             versaclock_som.fod0
                versaclock_som.out1
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20200603154329.31579-1-aford173@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/linux/fpga/fpga-bridge.h')
0 files changed, 0 insertions, 0 deletions
