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| author | Linus Walleij <linus.walleij@linaro.org> | 2013-10-16 10:05:53 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-10-16 10:05:53 +0200 |
| commit | 263c43a4479ecce52c0fdc84b4620e146263d549 (patch) | |
| tree | b29ad7d94892be7a40524400481f71a1c075a167 /include/linux/intel-iommu.h | |
| parent | 873ee9ed2c020b59e22a5082f73fc2960ec959bf (diff) | |
| parent | d0e639c9e06d44e713170031fe05fb60ebe680af (diff) | |
Merge tag 'v3.12-rc4' into devel
Linux 3.12-rc4
Diffstat (limited to 'include/linux/intel-iommu.h')
| -rw-r--r-- | include/linux/intel-iommu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 78e2ada50cd5..d380c5e68008 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -55,7 +55,7 @@ #define DMAR_IQT_REG 0x88 /* Invalidation queue tail register */ #define DMAR_IQ_SHIFT 4 /* Invalidation queue head/tail shift */ #define DMAR_IQA_REG 0x90 /* Invalidation queue addr register */ -#define DMAR_ICS_REG 0x98 /* Invalidation complete status register */ +#define DMAR_ICS_REG 0x9c /* Invalidation complete status register */ #define DMAR_IRTA_REG 0xb8 /* Interrupt remapping table addr register */ #define OFFSET_STRIDE (9) |