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authorShun Hao <shunh@nvidia.com>2023-12-06 16:01:35 +0200
committerLeon Romanovsky <leon@kernel.org>2023-12-12 09:03:57 +0200
commita429ec96c07f3020af12029acefc46f42ff5c91c (patch)
treef123c3e533bddc9b65954c97e92c989d7bf3f455 /include/linux/mlx5
parent1ca51628e7303718fdabe29c7d36f582500d5cf2 (diff)
RDMA/mlx5: Support handling of SW encap ICM area
New type for this ICM area, now the user can allocate/deallocate the new type of SW encap ICM memory, to store the encap header data which are managed by SW. Signed-off-by: Shun Hao <shunh@nvidia.com> Link: https://lore.kernel.org/r/546fe43fc700240709e30acf7713ec6834d652bd.1701871118.git.leon@kernel.org Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'include/linux/mlx5')
-rw-r--r--include/linux/mlx5/driver.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index d2b8d4a74a30..96cb8845682d 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -688,6 +688,7 @@ enum mlx5_sw_icm_type {
MLX5_SW_ICM_TYPE_STEERING,
MLX5_SW_ICM_TYPE_HEADER_MODIFY,
MLX5_SW_ICM_TYPE_HEADER_MODIFY_PATTERN,
+ MLX5_SW_ICM_TYPE_SW_ENCAP,
};
#define MLX5_MAX_RESERVED_GIDS 8