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authorLoic Poulain <loic.poulain@linaro.org>2018-12-04 13:25:32 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2018-12-17 08:26:24 +0100
commita89e7bcb18081c611eb6cf50edd440fa4983a71a (patch)
treebbee0cc5a3e892b9bebb1f0ca279e3c4dc7a0b24 /include/linux/mmc
parentc5413ad815a675b5c98a002353d8e96b44b164e9 (diff)
mmc: sdhci-msm: Disable CDR function on TX
The Clock Data Recovery (CDR) circuit allows to automatically adjust the RX sampling-point/phase for high frequency cards (SDR104, HS200...). CDR is automatically enabled during DLL configuration. However, according to the APQ8016 reference manual, this function must be disabled during TX and tuning phase in order to prevent any interferences during tuning challenges and unexpected phase alteration during TX transfers. This patch enables/disables CDR according to the current transfer mode. This fixes sporadic write transfer issues observed with some SDR104 and HS200 cards. Inspired by sdhci-msm downstream patch: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/432516/ Reported-by: Leonid Segal <leonid.s@variscite.com> Reported-by: Manabu Igusa <migusa@arrowjapan.com> Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'include/linux/mmc')
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