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authorJean-Philippe Brucker <jean-philippe.brucker@arm.com>2017-05-30 09:25:48 -0700
committerBjorn Helgaas <bhelgaas@google.com>2017-05-30 15:39:15 -0500
commita4f4fa681add289ebfec6d776376ad7a2ffda669 (patch)
treebad540deacc055ab92790af76e4e20f9107729a0 /include/linux
parent2ea659a9ef488125eb46da6eb571de5eae5c43f6 (diff)
PCI: Cache PRI and PASID bits in pci_dev
Device drivers need to check if an IOMMU enabled ATS, PRI and PASID in order to know when they can use the SVM API. Cache PRI and PASID bits in the pci_dev structure, similarly to what is currently done for ATS. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/pci.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 33c2b0b77429..f612c1d85863 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -356,6 +356,8 @@ struct pci_dev {
unsigned int msix_enabled:1;
unsigned int ari_enabled:1; /* ARI forwarding */
unsigned int ats_enabled:1; /* Address Translation Service */
+ unsigned int pasid_enabled:1; /* Process Address Space ID */
+ unsigned int pri_enabled:1; /* Page Request Interface */
unsigned int is_managed:1;
unsigned int needs_freset:1; /* Dev requires fundamental reset */
unsigned int state_saved:1;