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authorVladimir Oltean <vladimir.oltean@nxp.com>2022-01-06 00:11:49 +0200
committerDavid S. Miller <davem@davemloft.net>2022-01-06 12:16:21 +0000
commit63cfc65753d604edc6cfe07e6fba2bf8ececb293 (patch)
tree87b31cce61ac458754b659b55c72913fe3de95f9 /include/net/dsa.h
parentaf8c6db1975160753995932f43e1cd40d508aa6d (diff)
net: dsa: don't enumerate dsa_switch and dsa_port bit fields using commas
This is a cosmetic incremental fixup to commits 7787ff776398 ("net: dsa: merge all bools of struct dsa_switch into a single u32") bde82f389af1 ("net: dsa: merge all bools of struct dsa_port into a single u8") The desire to make this change was enunciated after posting these patches here: https://patchwork.kernel.org/project/netdevbpf/cover/20220105132141.2648876-1-vladimir.oltean@nxp.com/ but due to a slight timing overlap (message posted at 2:28 p.m. UTC, merge commit is at 2:46 p.m. UTC), that comment was missed and the changes were applied as-is. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/net/dsa.h')
-rw-r--r--include/net/dsa.h114
1 files changed, 56 insertions, 58 deletions
diff --git a/include/net/dsa.h b/include/net/dsa.h
index 5d0fec6db3ae..63c7f553f938 100644
--- a/include/net/dsa.h
+++ b/include/net/dsa.h
@@ -265,14 +265,16 @@ struct dsa_port {
u8 stp_state;
- u8 vlan_filtering:1,
- /* Managed by DSA on user ports and by
- * drivers on CPU and DSA ports
- */
- learning:1,
- lag_tx_enabled:1,
- devlink_port_setup:1,
- setup:1;
+ u8 vlan_filtering:1;
+
+ /* Managed by DSA on user ports and by drivers on CPU and DSA ports */
+ u8 learning:1;
+
+ u8 lag_tx_enabled:1;
+
+ u8 devlink_port_setup:1;
+
+ u8 setup:1;
struct device_node *dn;
unsigned int ageing_time;
@@ -331,56 +333,52 @@ struct dsa_switch {
struct dsa_switch_tree *dst;
unsigned int index;
- u32 setup:1,
- /* Disallow bridge core from requesting
- * different VLAN awareness settings on ports
- * if not hardware-supported
- */
- vlan_filtering_is_global:1,
- /* Keep VLAN filtering enabled on ports not
- * offloading any upper
- */
- needs_standalone_vlan_filtering:1,
- /* Pass .port_vlan_add and .port_vlan_del to
- * drivers even for bridges that have
- * vlan_filtering=0. All drivers should ideally
- * set this (and then the option would get
- * removed), but it is unknown whether this
- * would break things or not.
- */
- configure_vlan_while_not_filtering:1,
- /* If the switch driver always programs the CPU
- * port as egress tagged despite the VLAN
- * configuration indicating otherwise, then
- * setting @untag_bridge_pvid will force the
- * DSA receive path to pop the bridge's
- * default_pvid VLAN tagged frames to offer a
- * consistent behavior between a
- * vlan_filtering=0 and vlan_filtering=1 bridge
- * device.
- */
- untag_bridge_pvid:1,
- /* Let DSA manage the FDB entries towards the
- * CPU, based on the software bridge database.
- */
- assisted_learning_on_cpu_port:1,
- /* In case vlan_filtering_is_global is set, the
- * VLAN awareness state should be retrieved
- * from here and not from the per-port
- * settings.
- */
- vlan_filtering:1,
- /* MAC PCS does not provide link state change
- * interrupt, and requires polling. Flag passed
- * on to PHYLINK.
- */
- pcs_poll:1,
- /* For switches that only have the MRU
- * configurable. To ensure the configured MTU
- * is not exceeded, normalization of MRU on all
- * bridged interfaces is needed.
- */
- mtu_enforcement_ingress:1;
+ u32 setup:1;
+
+ /* Disallow bridge core from requesting different VLAN awareness
+ * settings on ports if not hardware-supported
+ */
+ u32 vlan_filtering_is_global:1;
+
+ /* Keep VLAN filtering enabled on ports not offloading any upper */
+ u32 needs_standalone_vlan_filtering:1;
+
+ /* Pass .port_vlan_add and .port_vlan_del to drivers even for bridges
+ * that have vlan_filtering=0. All drivers should ideally set this (and
+ * then the option would get removed), but it is unknown whether this
+ * would break things or not.
+ */
+ u32 configure_vlan_while_not_filtering:1;
+
+ /* If the switch driver always programs the CPU port as egress tagged
+ * despite the VLAN configuration indicating otherwise, then setting
+ * @untag_bridge_pvid will force the DSA receive path to pop the
+ * bridge's default_pvid VLAN tagged frames to offer a consistent
+ * behavior between a vlan_filtering=0 and vlan_filtering=1 bridge
+ * device.
+ */
+ u32 untag_bridge_pvid:1;
+
+ /* Let DSA manage the FDB entries towards the
+ * CPU, based on the software bridge database.
+ */
+ u32 assisted_learning_on_cpu_port:1;
+
+ /* In case vlan_filtering_is_global is set, the VLAN awareness state
+ * should be retrieved from here and not from the per-port settings.
+ */
+ u32 vlan_filtering:1;
+
+ /* MAC PCS does not provide link state change interrupt, and requires
+ * polling. Flag passed on to PHYLINK.
+ */
+ u32 pcs_poll:1;
+
+ /* For switches that only have the MRU configurable. To ensure the
+ * configured MTU is not exceeded, normalization of MRU on all bridged
+ * interfaces is needed.
+ */
+ u32 mtu_enforcement_ingress:1;
/* Listener for switch fabric events */
struct notifier_block nb;