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| author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2021-03-12 12:50:20 +0000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-03-29 13:22:04 +1100 |
| commit | e464d92b292cc61f8f0791cf87d3646204bbb208 (patch) | |
| tree | cd580d707c120a2391b29e0a64e3e4208cf2cad0 /mm/vmscan.c | |
| parent | 79f4bb17f18162dd95d6aeb6dc3b7da54d6139aa (diff) | |
powerpc/32: Use fast instruction to set MSR RI in exception prolog on 8xx
8xx has registers SPRN_NRI, SPRN_EID and SPRN_EIE for changing
MSR EE and RI.
Use SPRN_EID in exception prolog to set RI.
On an 8xx, it reduces the null_syscall test by 3 cycles.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/65f6bda827c2a2abce71ea7e07543e791163da33.1615552866.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'mm/vmscan.c')
0 files changed, 0 insertions, 0 deletions