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| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2024-08-27 17:06:28 -0400 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2024-08-27 17:06:28 -0400 |
| commit | 04cf420bbc32a599aa2481725f708435ea19bf3d (patch) | |
| tree | 232b7a3c36adc63c92ca60ec39ed5f031c2e5c53 /rust/compiler_builtins.rs | |
| parent | 67733d7a71503fd3e32eeada371f8aa2516c5c95 (diff) | |
| parent | e55ef65510a401862b902dc979441ea10ae25c61 (diff) | |
Merge drm/drm-next into drm-intel-next
Need to take some Xe bo definition in here before
we can add the BMG display 64k aligned size restrictions.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'rust/compiler_builtins.rs')
| -rw-r--r-- | rust/compiler_builtins.rs | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/rust/compiler_builtins.rs b/rust/compiler_builtins.rs index bba2922c6ef7..f14b8d7caf89 100644 --- a/rust/compiler_builtins.rs +++ b/rust/compiler_builtins.rs @@ -40,16 +40,19 @@ macro_rules! define_panicking_intrinsics( define_panicking_intrinsics!("`f32` should not be used", { __addsf3, __eqsf2, + __extendsfdf2, __gesf2, __lesf2, __ltsf2, __mulsf3, __nesf2, + __truncdfsf2, __unordsf2, }); define_panicking_intrinsics!("`f64` should not be used", { __adddf3, + __eqdf2, __ledf2, __ltdf2, __muldf3, |