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authorSinan Kaya <okaya@codeaurora.org>2018-04-16 18:16:56 -0400
committerMatt Turner <mattst88@gmail.com>2018-05-22 18:10:36 -0700
commit92d7223a74235054f2aa7227d207d9c57f84dca0 (patch)
tree5334ad1c8c2a41f1133ae7d3905a5163043184ee /scripts/ld-version.sh
parentf5e82fa26063e6fad10624ff600457d878fa6e41 (diff)
alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering #2
memory-barriers.txt has been updated with the following requirement. "When using writel(), a prior wmb() is not needed to guarantee that the cache coherent memory writes have completed before writing to the MMIO region." Current writeX() and iowriteX() implementations on alpha are not satisfying this requirement as the barrier is after the register write. Move mb() in writeX() and iowriteX() functions to guarantee that HW observes memory changes before performing register operations. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Matt Turner <mattst88@gmail.com>
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