diff options
| author | Cezary Rojewski <cezary.rojewski@intel.com> | 2024-02-20 12:50:33 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-02-20 13:19:59 +0000 |
| commit | 5acb19ecd1982bd1578912473b33df75a23fefc2 (patch) | |
| tree | b3cec7e54e4adbc313ebf541302900ca05bf9dc1 /sound/soc/intel/avs/core.c | |
| parent | 275b583d047a23c48d01b0c45fb5d95618c1da2d (diff) | |
ASoC: Intel: avs: TGL-based platforms support
Define handlers specific to cAVS 2.5 platforms, that is TGL, ADL, RPL
and all other variants based on this very version of AudioDSP
architecture. Most operations are inherited from their predecessors with
the major difference being AudioDSP cores management - firmware handlers
that on its own so there is no need to interfere.
Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://msgid.link/r/20240220115035.770402-9-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel/avs/core.c')
| -rw-r--r-- | sound/soc/intel/avs/core.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/sound/soc/intel/avs/core.c b/sound/soc/intel/avs/core.c index 17444ffca019..adc2b9300734 100644 --- a/sound/soc/intel/avs/core.c +++ b/sound/soc/intel/avs/core.c @@ -828,6 +828,23 @@ static const struct avs_spec jsl_desc = { .hipc = &cnl_hipc_spec, }; +#define AVS_TGL_BASED_SPEC(sname) \ +static const struct avs_spec sname##_desc = { \ + .name = #sname, \ + .min_fw_version = { 10, 29, 0, 5646 }, \ + .dsp_ops = &avs_tgl_dsp_ops, \ + .core_init_mask = 1, \ + .attributes = AVS_PLATATTR_IMR, \ + .sram = &apl_sram_spec, \ + .hipc = &cnl_hipc_spec, \ +} + +AVS_TGL_BASED_SPEC(lkf); +AVS_TGL_BASED_SPEC(tgl); +AVS_TGL_BASED_SPEC(ehl); +AVS_TGL_BASED_SPEC(adl); +AVS_TGL_BASED_SPEC(adl_n); + static const struct pci_device_id avs_ids[] = { { PCI_DEVICE_DATA(INTEL, HDA_SKL_LP, &skl_desc) }, { PCI_DEVICE_DATA(INTEL, HDA_SKL, &skl_desc) }, @@ -846,6 +863,23 @@ static const struct pci_device_id avs_ids[] = { { PCI_DEVICE_DATA(INTEL, HDA_ICL_N, &icl_desc) }, { PCI_DEVICE_DATA(INTEL, HDA_ICL_H, &icl_desc) }, { PCI_DEVICE_DATA(INTEL, HDA_JSL_N, &jsl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_LKF, &lkf_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_TGL_LP, &tgl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_TGL_H, &tgl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_CML_R, &tgl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_EHL_0, &ehl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_EHL_3, &ehl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_ADL_S, &adl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_ADL_P, &adl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_ADL_PS, &adl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_ADL_M, &adl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_ADL_PX, &adl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_ADL_N, &adl_n_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_RPL_S, &adl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_RPL_P_0, &adl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_RPL_P_1, &adl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_RPL_M, &adl_desc) }, + { PCI_DEVICE_DATA(INTEL, HDA_RPL_PX, &adl_desc) }, { 0 } }; MODULE_DEVICE_TABLE(pci, avs_ids); |