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| author | Wenhua Lin <Wenhua.Lin@unisoc.com> | 2024-11-13 19:05:15 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-11-13 15:14:17 +0100 |
| commit | 8f9eeb5cfbfe171384759ececea49e92415103a4 (patch) | |
| tree | bf1c3f6b522038f90afd5f7dfe2fd901fb37957e /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | b3a882e814e007bfd0d50dc2150d48d47cb1973b (diff) | |
serial: sprd: Add support for sc9632
Due to the platform's new project uart ip upgrade,
the new project's timeout interrupt needs to use bit17
while other projects' timeout interrupt needs to use
bit13, using private data to adapt and be compatible
with all projects.
Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com>
Link: https://lore.kernel.org/r/20241113110516.2166328-2-Wenhua.Lin@unisoc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions