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| author | Chris Brandt <chris.brandt@renesas.com> | 2018-09-17 13:26:23 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-09-18 16:07:24 +0200 |
| commit | 3d8b43ad9c0cf023dd12458f23250c1b86b21e4e (patch) | |
| tree | 6df0dc972880a06489552e7b8aa86bc380f04ce3 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | a1c2fd7e1098ea49ff31785ad970311d64e5904e (diff) | |
serial: sh-sci: Add earlycon for R7S9210
Since the register offsets are different for RZ/A2 SCIF, we need
to declare a separate string for it.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions