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| author | Sergio Paracuellos <sergio.paracuellos@gmail.com> | 2020-11-23 10:36:37 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-11-26 09:12:18 +0100 |
| commit | 1de16e38f1fdbfd9d842a06919098813ed93abf7 (patch) | |
| tree | 02363bd63d1bfd504c09923d7e483438d27a2082 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 108b2f2a9724548ffa64274731034d9723665c71 (diff) | |
staging: mt7621-pci: remove 'RALINK_PCI_IMBASEBAR0_ADDR' register
Register 'RALINK_PCI_IMBASEBAR0_ADDR' contains internal memory
base address for BAR0. We don't really need to write anything
there at all since its initial value contains always a desired
valid value. Hence remove register definition and related code.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20201123093637.8300-8-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions