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| author | Herve Codina <herve.codina@bootlin.com> | 2021-12-02 10:52:55 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2021-12-13 17:13:54 +0100 |
| commit | 7cf4cc3e8524989f9f1619ba49726576a46ee32d (patch) | |
| tree | 6e2aac0a7e7184aadf18caeed6fcf886fba4e8bc /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 5d7248e956e68f257b46cdfcee465792086e2c01 (diff) | |
ARM: dts: spear3xx: Add spear320s dtsi
The SPEAr320s SOC is a SPEAr320 SOC variant.
Mostly identical to the SPEAr320 SOC variant, it has a
new interrupt routing for PL_PGIOs.
Add spear320s.dtsi to handle SPEAr320s SOC
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20211202095255.165797-7-herve.codina@bootlin.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions