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author | Zhanjun Dong <zhanjun.dong@intel.com> | 2024-11-26 12:10:52 -0800 |
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committer | Thomas Hellström <thomas.hellstrom@linux.intel.com> | 2024-12-03 10:33:13 +0100 |
commit | 4495816122cc39c428ebbc4ffd30110bb2877df9 (patch) | |
tree | e2ad3192fca780d42dbae1bdfcf35847196ce193 /tools/perf/tests/shell/lib/perf_json_output_lint.py | |
parent | 40384c840ea1944d7c5a392e8975ed088ecf0b37 (diff) |
drm/xe/guc: Fix missing init value and add register order check
Fix missing initial value for last_value.
For GuC capture register definition, it is required to define 64bit
register in a pair of 2 consecutive 32bit register entries, low first,
then hi. Add code to check this order.
Changes from prior revs:
v5:- Correct cross-line comment format
v4:- Fix warn on condition and remove skipping
v3:- Move break inside brace
v2:- Correct the fix tag pointed commit
Add examples in comments for warning
Add 1 missing hi condition check
Fixes: ecb633646391 ("drm/xe/guc: Plumb GuC-capture into dev coredump")
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241126201052.1937079-1-zhanjun.dong@intel.com
(cherry picked from commit 6f59fbcfa041e7d69e5e5f39d4c8cffa06fdc50b)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Diffstat (limited to 'tools/perf/tests/shell/lib/perf_json_output_lint.py')
0 files changed, 0 insertions, 0 deletions