diff options
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index fe529b67369e..7fea9bec7b64 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -558,6 +558,7 @@ union dmub_fw_meta { //============================================================================== //< DMUB Trace Buffer>================================================================ //============================================================================== +#if !defined(TENSILICA) && !defined(DMUB_TRACE_ENTRY_DEFINED) /** * dmub_trace_code_t - firmware trace code, 32-bits */ @@ -572,6 +573,7 @@ struct dmcub_trace_buf_entry { uint32_t param0; /**< trace defined parameter 0 */ uint32_t param1; /**< trace defined parameter 1 */ }; +#endif //============================================================================== //< DMUB_STATUS>================================================================ @@ -2538,6 +2540,18 @@ enum dmub_cmd_psr_type { DMUB_CMD__SET_PSR_POWER_OPT = 7, }; +/** + * Different PSR residency modes. + * Different modes change the definition of PSR residency. + */ +enum psr_residency_mode { + PSR_RESIDENCY_MODE_PHY = 0, + PSR_RESIDENCY_MODE_ALPM, + PSR_RESIDENCY_MODE_ENABLEMENT_PERIOD, + /* Do not add below. */ + PSR_RESIDENCY_MODE_LAST_ELEMENT, +}; + enum dmub_cmd_fams_type { DMUB_CMD__FAMS_SETUP_FW_CTRL = 0, DMUB_CMD__FAMS_DRR_UPDATE = 1, @@ -3260,18 +3274,6 @@ struct dmub_rb_cmd_psr_set_power_opt { }; /** - * Different PSR residency modes. - * Different modes change the definition of PSR residency. - */ -enum psr_residency_mode { - PSR_RESIDENCY_MODE_PHY = 0, - PSR_RESIDENCY_MODE_ALPM, - PSR_RESIDENCY_MODE_ENABLEMENT_PERIOD, - /* Do not add below. */ - PSR_RESIDENCY_MODE_LAST_ELEMENT, -}; - -/** * Definition of Replay Residency GPINT command. * Bit[0] - Residency mode for Revision 0 * Bit[1] - Enable/Disable state |