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-rw-r--r--drivers/regulator/mt6358-regulator.c15
-rw-r--r--include/linux/mfd/mt6358/registers.h6
2 files changed, 19 insertions, 2 deletions
diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c
index a1eae45f5fee..b34ad85db771 100644
--- a/drivers/regulator/mt6358-regulator.c
+++ b/drivers/regulator/mt6358-regulator.c
@@ -123,10 +123,13 @@ struct mt6358_regulator_info {
.type = REGULATOR_VOLTAGE, \
.id = MT6358_ID_##vreg, \
.owner = THIS_MODULE, \
- .n_voltages = 1, \
+ .n_voltages = 11, \
+ .vsel_reg = MT6358_##vreg##_ANA_CON0, \
+ .vsel_mask = GENMASK(3, 0), \
.enable_reg = enreg, \
.enable_mask = BIT(enbit), \
.min_uV = volt, \
+ .uV_step = 10000, \
}, \
.status_reg = MT6358_LDO_##vreg##_CON1, \
.qi = BIT(15), \
@@ -219,10 +222,13 @@ struct mt6358_regulator_info {
.type = REGULATOR_VOLTAGE, \
.id = MT6366_ID_##vreg, \
.owner = THIS_MODULE, \
- .n_voltages = 1, \
+ .n_voltages = 11, \
+ .vsel_reg = MT6358_##vreg##_ANA_CON0, \
+ .vsel_mask = GENMASK(3, 0), \
.enable_reg = enreg, \
.enable_mask = BIT(enbit), \
.min_uV = volt, \
+ .uV_step = 10000, \
}, \
.status_reg = MT6358_LDO_##vreg##_CON1, \
.qi = BIT(15), \
@@ -476,8 +482,13 @@ static const struct regulator_ops mt6358_volt_table_ops = {
.get_status = mt6358_get_status,
};
+/* "Fixed" LDOs with output voltage calibration +0 ~ +10 mV */
static const struct regulator_ops mt6358_volt_fixed_ops = {
.list_voltage = regulator_list_voltage_linear,
+ .map_voltage = regulator_map_voltage_linear,
+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
+ .get_voltage_sel = mt6358_get_buck_voltage_sel,
+ .set_voltage_time_sel = regulator_set_voltage_time_sel,
.enable = regulator_enable_regmap,
.disable = regulator_disable_regmap,
.is_enabled = regulator_is_enabled_regmap,
diff --git a/include/linux/mfd/mt6358/registers.h b/include/linux/mfd/mt6358/registers.h
index 3d33517f178c..5ea2590be710 100644
--- a/include/linux/mfd/mt6358/registers.h
+++ b/include/linux/mfd/mt6358/registers.h
@@ -262,6 +262,12 @@
#define MT6358_LDO_VBIF28_CON3 0x1db0
#define MT6358_VCAMA1_ANA_CON0 0x1e08
#define MT6358_VCAMA2_ANA_CON0 0x1e0c
+#define MT6358_VFE28_ANA_CON0 0x1e10
+#define MT6358_VCN28_ANA_CON0 0x1e14
+#define MT6358_VBIF28_ANA_CON0 0x1e18
+#define MT6358_VAUD28_ANA_CON0 0x1e1c
+#define MT6358_VAUX18_ANA_CON0 0x1e20
+#define MT6358_VXO22_ANA_CON0 0x1e24
#define MT6358_VCN33_ANA_CON0 0x1e28
#define MT6358_VSIM1_ANA_CON0 0x1e2c
#define MT6358_VSIM2_ANA_CON0 0x1e30