diff options
Diffstat (limited to 'drivers/clk/meson/vclk.c')
| -rw-r--r-- | drivers/clk/meson/vclk.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c index 36f637d2d01b..6a167ebdc8d7 100644 --- a/drivers/clk/meson/vclk.c +++ b/drivers/clk/meson/vclk.c @@ -49,7 +49,7 @@ const struct clk_ops meson_vclk_gate_ops = { .disable = meson_vclk_gate_disable, .is_enabled = meson_vclk_gate_is_enabled, }; -EXPORT_SYMBOL_NS_GPL(meson_vclk_gate_ops, CLK_MESON); +EXPORT_SYMBOL_NS_GPL(meson_vclk_gate_ops, "CLK_MESON"); /* The VCLK Divider has supplementary reset & enable bits */ @@ -134,9 +134,9 @@ const struct clk_ops meson_vclk_div_ops = { .disable = meson_vclk_div_disable, .is_enabled = meson_vclk_div_is_enabled, }; -EXPORT_SYMBOL_NS_GPL(meson_vclk_div_ops, CLK_MESON); +EXPORT_SYMBOL_NS_GPL(meson_vclk_div_ops, "CLK_MESON"); MODULE_DESCRIPTION("Amlogic vclk clock driver"); MODULE_AUTHOR("Neil Armstrong <neil.armstrong@linaro.org>"); MODULE_LICENSE("GPL"); -MODULE_IMPORT_NS(CLK_MESON); +MODULE_IMPORT_NS("CLK_MESON"); |