diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 22 |
1 files changed, 1 insertions, 21 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index d069661abe45..b5b5ccf0ed71 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -110,10 +110,8 @@ MODULE_FIRMWARE(FIRMWARE_VANGOGH_DMUB); MODULE_FIRMWARE(FIRMWARE_DIMGREY_CAVEFISH_DMUB); #define FIRMWARE_BEIGE_GOBY_DMUB "amdgpu/beige_goby_dmcub.bin" MODULE_FIRMWARE(FIRMWARE_BEIGE_GOBY_DMUB); -#if defined(CONFIG_DRM_AMD_DC_DCN3_1) #define FIRMWARE_YELLOW_CARP_DMUB "amdgpu/yellow_carp_dmcub.bin" MODULE_FIRMWARE(FIRMWARE_YELLOW_CARP_DMUB); -#endif #define FIRMWARE_RAVEN_DMCU "amdgpu/raven_dmcu.bin" MODULE_FIRMWARE(FIRMWARE_RAVEN_DMCU); @@ -1145,16 +1143,10 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) if (ASICREV_IS_GREEN_SARDINE(adev->external_rev_id)) init_data.flags.disable_dmcu = true; break; -#if defined(CONFIG_DRM_AMD_DC_DCN) case CHIP_VANGOGH: - init_data.flags.gpu_vm_support = true; - break; -#endif -#if defined(CONFIG_DRM_AMD_DC_DCN3_1) case CHIP_YELLOW_CARP: init_data.flags.gpu_vm_support = true; break; -#endif default: break; } @@ -1411,9 +1403,7 @@ static int load_dmcu_fw(struct amdgpu_device *adev) case CHIP_DIMGREY_CAVEFISH: case CHIP_BEIGE_GOBY: case CHIP_VANGOGH: -#if defined(CONFIG_DRM_AMD_DC_DCN3_1) case CHIP_YELLOW_CARP: -#endif return 0; case CHIP_NAVI12: fw_name_dmcu = FIRMWARE_NAVI12_DMCU; @@ -1532,12 +1522,10 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev) dmub_asic = DMUB_ASIC_DCN303; fw_name_dmub = FIRMWARE_BEIGE_GOBY_DMUB; break; -#if defined(CONFIG_DRM_AMD_DC_DCN3_1) case CHIP_YELLOW_CARP: dmub_asic = DMUB_ASIC_DCN31; fw_name_dmub = FIRMWARE_YELLOW_CARP_DMUB; break; -#endif default: /* ASIC doesn't support DMUB. */ @@ -2232,7 +2220,7 @@ static int dm_resume(void *handle) = 0xffffffff; } } -#if defined(CONFIG_DRM_AMD_DC_DCN3_1) +#if defined(CONFIG_DRM_AMD_DC_DCN) /* * Resource allocation happens for link encoders for newer ASIC in * dc_validate_global_state, so we need to revalidate it. @@ -3786,9 +3774,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) switch (adev->asic_type) { case CHIP_SIENNA_CICHLID: case CHIP_NAVY_FLOUNDER: -#if defined(CONFIG_DRM_AMD_DC_DCN3_1) case CHIP_YELLOW_CARP: -#endif case CHIP_RENOIR: if (register_outbox_irq_handlers(dm->adev)) { DRM_ERROR("DM: Failed to initialize IRQ\n"); @@ -3893,9 +3879,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) case CHIP_DIMGREY_CAVEFISH: case CHIP_BEIGE_GOBY: case CHIP_VANGOGH: -#if defined(CONFIG_DRM_AMD_DC_DCN3_1) case CHIP_YELLOW_CARP: -#endif if (dcn10_register_irq_handlers(dm->adev)) { DRM_ERROR("DM: Failed to initialize IRQ\n"); goto fail; @@ -4067,13 +4051,11 @@ static int dm_early_init(void *handle) adev->mode_info.num_hpd = 6; adev->mode_info.num_dig = 6; break; -#if defined(CONFIG_DRM_AMD_DC_DCN3_1) case CHIP_YELLOW_CARP: adev->mode_info.num_crtc = 4; adev->mode_info.num_hpd = 4; adev->mode_info.num_dig = 4; break; -#endif case CHIP_NAVI14: case CHIP_DIMGREY_CAVEFISH: adev->mode_info.num_crtc = 5; @@ -4311,9 +4293,7 @@ fill_gfx9_tiling_info_from_device(const struct amdgpu_device *adev, adev->asic_type == CHIP_NAVY_FLOUNDER || adev->asic_type == CHIP_DIMGREY_CAVEFISH || adev->asic_type == CHIP_BEIGE_GOBY || -#if defined(CONFIG_DRM_AMD_DC_DCN3_1) adev->asic_type == CHIP_YELLOW_CARP || -#endif adev->asic_type == CHIP_VANGOGH) tiling_info->gfx9.num_pkrs = adev->gfx.config.gb_addr_config_fields.num_pkrs; } |