1 files changed, 42 insertions, 31 deletions

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index 6ada9a262721..142ac0613d5b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -336,19 +336,28 @@ static const struct dcn_transform_mask tf_mask = {
 };
 
 
-static const struct dcn_mpc_registers mpc_regs = {
-	MPC_COMMON_REG_LIST_DCN1_0(0),
-	MPC_COMMON_REG_LIST_DCN1_0(1),
-	MPC_COMMON_REG_LIST_DCN1_0(2),
-	MPC_COMMON_REG_LIST_DCN1_0(3),
+#define mpcc_regs(id)\
+[id] = {\
+	MPCC_COMMON_REG_LIST_DCN1_0(id),\
+	MPC_COMMON_REG_LIST_DCN1_0(0),\
+	MPC_COMMON_REG_LIST_DCN1_0(1),\
+	MPC_COMMON_REG_LIST_DCN1_0(2),\
+	MPC_COMMON_REG_LIST_DCN1_0(3),\
+}
+
+static const struct dcn_mpcc_registers mpcc_regs[] = {
+	mpcc_regs(0),
+	mpcc_regs(1),
+	mpcc_regs(2),
+	mpcc_regs(3),
 };
 
-static const struct dcn_mpc_shift mpc_shift = {
-	MPC_COMMON_MASK_SH_LIST_DCN1_0(__SHIFT)
+static const struct dcn_mpcc_shift mpcc_shift = {
+	MPCC_COMMON_MASK_SH_LIST_DCN1_0(__SHIFT)
 };
 
-static const struct dcn_mpc_mask mpc_mask = {
-	MPC_COMMON_MASK_SH_LIST_DCN1_0(_MASK),
+static const struct dcn_mpcc_mask mpcc_mask = {
+	MPCC_COMMON_MASK_SH_LIST_DCN1_0(_MASK),
 };
 
 #define tg_regs(id)\
@@ -509,28 +518,22 @@ static struct output_pixel_processor *dcn10_opp_create(
 	return &opp->base;
 }
 
-static struct mpc *dcn10_mpc_create(
-	struct dc_context *ctx)
+static struct mpcc *dcn10_mpcc_create(
+	struct dc_context *ctx,
+	int inst)
 {
-	struct dcn10_mpc *mpc = dm_alloc(sizeof(struct dcn10_mpc));
+	struct dcn10_mpcc *mpcc10 = dm_alloc(sizeof(struct dcn10_mpcc));
 
-	if (!mpc)
+	if (!mpcc10)
 		return NULL;
 
-	mpc->base.ctx = ctx;
-	mpc->mpc_regs = &mpc_regs;
-	mpc->mpc_shift = &mpc_shift;
-	mpc->mpc_mask = &mpc_mask;
+	dcn10_mpcc_construct(mpcc10, ctx,
+			&mpcc_regs[inst],
+			&mpcc_shift,
+			&mpcc_mask,
+			inst);
 
-	return &mpc->base;
-}
-
-static void dcn10_mpc_destroy(struct mpc **mpc_base)
-{
-	if (*mpc_base)
-		dm_free(TO_DCN10_MPC(*mpc_base));
-
-	*mpc_base = NULL;
+	return &mpcc10->base;
 }
 
 static struct timing_generator *dcn10_timing_generator_create(
@@ -736,6 +739,11 @@ static void destruct(struct dcn10_resource_pool *pool)
 			dm_free(DCN10TG_FROM_TG(pool->base.timing_generators[i]));
 			pool->base.timing_generators[i] = NULL;
 		}
+
+		if (pool->base.mpcc[i] != NULL)	{
+			dm_free(TO_DCN10_MPCC(pool->base.mpcc[i]));
+			pool->base.mpcc[i] = NULL;
+		}
 	}
 
 	for (i = 0; i < pool->base.stream_enc_count; i++) {
@@ -760,9 +768,6 @@ static void destruct(struct dcn10_resource_pool *pool)
 		pool->base.dp_clock_source = NULL;
 	}
 
-	if (pool->base.mpc != NULL)
-		dcn10_mpc_destroy(&pool->base.mpc);
-
 	if (pool->base.abm != NULL)
 		dce_abm_destroy(&pool->base.abm);
 
@@ -1007,6 +1012,7 @@ static struct pipe_ctx *dcn10_acquire_idle_pipe_for_layer(
 	idle_pipe->stream = head_pipe->stream;
 	idle_pipe->tg = head_pipe->tg;
 
+	idle_pipe->mpcc = pool->mpcc[idle_pipe->pipe_idx];
 	idle_pipe->mi = pool->mis[idle_pipe->pipe_idx];
 	idle_pipe->ipp = pool->ipps[idle_pipe->pipe_idx];
 	idle_pipe->xfm = pool->transforms[idle_pipe->pipe_idx];
@@ -1427,10 +1433,14 @@ static bool construct(
 			dm_error("DC: failed to create tg!\n");
 			goto otg_create_fail;
 		}
+		pool->base.mpcc[i] = dcn10_mpcc_create(ctx, i);
+		if (pool->base.mpcc[i] == NULL) {
+			BREAK_TO_DEBUGGER();
+			dm_error("DC: failed to create mpcc!\n");
+			goto mpcc_create_fail;
+		}
 	}
 
-	pool->base.mpc = dcn10_mpc_create(ctx);
-
 	if (!resource_construct(num_virtual_links, dc, &pool->base,
 			(!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) ?
 			&res_create_funcs : &res_create_maximus_funcs)))
@@ -1444,6 +1454,7 @@ static bool construct(
 	return true;
 
 disp_clk_create_fail:
+mpcc_create_fail:
 otg_create_fail:
 opp_create_fail:
 transform_create_fail: