diff options
Diffstat (limited to 'drivers/gpu/drm/amd/include')
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h index f446b1760f7c..846a8cf3926a 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h @@ -8187,9 +8187,9 @@ #define regBIF_BX0_PCIE_INDEX_BASE_IDX 5 #define regBIF_BX0_PCIE_DATA 0x800d #define regBIF_BX0_PCIE_DATA_BASE_IDX 5 -#define regBIF_BX0_PCIE_INDEX2 0xe +#define regBIF_BX0_PCIE_INDEX2 0x800e #define regBIF_BX0_PCIE_INDEX2_BASE_IDX 0 -#define regBIF_BX0_PCIE_DATA2 0xf +#define regBIF_BX0_PCIE_DATA2 0x800f #define regBIF_BX0_PCIE_DATA2_BASE_IDX 0 #define regBIF_BX0_SBIOS_SCRATCH_0 0x8048 #define regBIF_BX0_SBIOS_SCRATCH_0_BASE_IDX 5 @@ -8678,7 +8678,10 @@ #define regBIF_BX_PF1_MM_DATA_BASE_IDX 0 #define regBIF_BX_PF1_MM_INDEX_HI 0x0006 #define regBIF_BX_PF1_MM_INDEX_HI_BASE_IDX 0 - +#define regBIF_BX_PF1_RSMU_INDEX 0x0000 +#define regBIF_BX_PF1_RSMU_INDEX_BASE_IDX 1 +#define regBIF_BX_PF1_RSMU_DATA 0x0001 +#define regBIF_BX_PF1_RSMU_DATA_BASE_IDX 1 // addressBlock: nbio_nbif0_bif_bx_BIFDEC1:1 // base address: 0x0 |