diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_psr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.c | 22 | 
1 files changed, 16 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index b3631b722de3..d9a395c486d3 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1185,6 +1185,7 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,  {  	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  	enum pipe pipe = plane->pipe; +	const struct drm_rect *clip;  	u32 val;  	if (!crtc_state->enable_psr2_sel_fetch) @@ -1196,16 +1197,20 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,  	if (!val || plane->id == PLANE_CURSOR)  		return; -	val = plane_state->uapi.dst.y1 << 16 | plane_state->uapi.dst.x1; +	clip = &plane_state->psr2_sel_fetch_area; + +	val = (clip->y1 + plane_state->uapi.dst.y1) << 16; +	val |= plane_state->uapi.dst.x1;  	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_POS(pipe, plane->id), val); -	val = plane_state->color_plane[color_plane].y << 16; +	/* TODO: consider tiling and auxiliary surfaces */ +	val = (clip->y1 + plane_state->color_plane[color_plane].y) << 16;  	val |= plane_state->color_plane[color_plane].x;  	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_OFFSET(pipe, plane->id),  			  val);  	/* Sizes are 0 based */ -	val = ((drm_rect_height(&plane_state->uapi.src) >> 16) - 1) << 16; +	val = (drm_rect_height(clip) - 1) << 16;  	val |= (drm_rect_width(&plane_state->uapi.src) >> 16) - 1;  	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_SIZE(pipe, plane->id), val);  } @@ -1279,7 +1284,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,  	for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,  					     new_plane_state, i) { -		struct drm_rect temp; +		struct drm_rect *sel_fetch_area, temp;  		if (new_plane_state->uapi.crtc != crtc_state->uapi.crtc)  			continue; @@ -1302,8 +1307,13 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,  		 * For now doing a selective fetch in the whole plane area,  		 * optimizations will come in the future.  		 */ -		temp.y1 = new_plane_state->uapi.dst.y1; -		temp.y2 = new_plane_state->uapi.dst.y2; +		sel_fetch_area = &new_plane_state->psr2_sel_fetch_area; +		sel_fetch_area->y1 = new_plane_state->uapi.src.y1 >> 16; +		sel_fetch_area->y2 = new_plane_state->uapi.src.y2 >> 16; + +		temp = *sel_fetch_area; +		temp.y1 += new_plane_state->uapi.dst.y1; +		temp.y2 += new_plane_state->uapi.dst.y2;  		clip_area_update(&pipe_clip, &temp);  	}  | 
