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path: root/drivers/gpu/drm/msm/dp/dp_ctrl.c
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Diffstat (limited to 'drivers/gpu/drm/msm/dp/dp_ctrl.c')
-rw-r--r--drivers/gpu/drm/msm/dp/dp_ctrl.c73
1 files changed, 57 insertions, 16 deletions
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 4a741f5b7b5a..c207e4d7f0da 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -69,6 +69,11 @@ struct dp_vc_tu_mapping_table {
u8 tu_size_minus1;
};
+struct dss_module_power {
+ unsigned int num_clk;
+ struct clk_bulk_data *clocks;
+};
+
struct dp_ctrl_private {
struct dp_ctrl dp_ctrl;
struct drm_device *drm_dev;
@@ -79,6 +84,7 @@ struct dp_ctrl_private {
struct dp_parser *parser;
struct dp_catalog *catalog;
+ struct dss_module_power mp[DP_MAX_PM];
struct clk *pixel_clk;
struct completion idle_comp;
@@ -90,6 +96,15 @@ struct dp_ctrl_private {
bool stream_clks_on;
};
+static inline const char *dp_pm_name(enum dp_pm_type module)
+{
+ switch (module) {
+ case DP_CORE_PM: return "DP_CORE_PM";
+ case DP_CTRL_PM: return "DP_CTRL_PM";
+ default: return "???";
+ }
+}
+
static int dp_aux_link_configure(struct drm_dp_aux *aux,
struct dp_link_info *link)
{
@@ -1329,7 +1344,7 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl,
if (pm_type != DP_CORE_PM &&
pm_type != DP_CTRL_PM) {
DRM_ERROR("unsupported ctrl module: %s\n",
- dp_parser_pm_name(pm_type));
+ dp_pm_name(pm_type));
return -EINVAL;
}
@@ -1349,7 +1364,7 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl,
if ((pm_type == DP_CTRL_PM) && (!ctrl->core_clks_on)) {
drm_dbg_dp(ctrl->drm_dev,
"Enable core clks before link clks\n");
- mp = &ctrl->parser->mp[DP_CORE_PM];
+ mp = &ctrl->mp[DP_CORE_PM];
ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks);
if (ret)
@@ -1359,7 +1374,7 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl,
}
}
- mp = &ctrl->parser->mp[pm_type];
+ mp = &ctrl->mp[pm_type];
if (enable) {
ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks);
if (ret)
@@ -1375,7 +1390,7 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl,
drm_dbg_dp(ctrl->drm_dev, "%s clocks for %s\n",
enable ? "enable" : "disable",
- dp_parser_pm_name(pm_type));
+ dp_pm_name(pm_type));
drm_dbg_dp(ctrl->drm_dev,
"stream_clks:%s link_clks:%s core_clks:%s\n",
ctrl->stream_clks_on ? "on" : "off",
@@ -2153,30 +2168,56 @@ irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl)
return ret;
}
+static const char *core_clks[] = {
+ "core_iface",
+ "core_aux",
+};
+
+static const char *ctrl_clks[] = {
+ "ctrl_link",
+ "ctrl_link_iface",
+};
+
static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl)
{
- struct dp_ctrl_private *ctrl_private;
- int rc = 0;
- struct dss_module_power *core, *ctrl;
+ struct dp_ctrl_private *ctrl;
+ struct dss_module_power *core, *link;
struct device *dev;
+ int i, rc;
+
+ ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl);
+ dev = ctrl->dev;
- ctrl_private = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl);
- dev = ctrl_private->dev;
+ core = &ctrl->mp[DP_CORE_PM];
+ link = &ctrl->mp[DP_CTRL_PM];
- core = &ctrl_private->parser->mp[DP_CORE_PM];
- ctrl = &ctrl_private->parser->mp[DP_CTRL_PM];
+ core->num_clk = ARRAY_SIZE(core_clks);
+ core->clocks = devm_kcalloc(dev, core->num_clk, sizeof(*core->clocks), GFP_KERNEL);
+ if (!core->clocks)
+ return -ENOMEM;
+
+ for (i = 0; i < core->num_clk; i++)
+ core->clocks[i].id = core_clks[i];
rc = devm_clk_bulk_get(dev, core->num_clk, core->clocks);
if (rc)
return rc;
- rc = devm_clk_bulk_get(dev, ctrl->num_clk, ctrl->clocks);
+ link->num_clk = ARRAY_SIZE(ctrl_clks);
+ link->clocks = devm_kcalloc(dev, link->num_clk, sizeof(*link->clocks), GFP_KERNEL);
+ if (!link->clocks)
+ return -ENOMEM;
+
+ for (i = 0; i < link->num_clk; i++)
+ link->clocks[i].id = ctrl_clks[i];
+
+ rc = devm_clk_bulk_get(dev, link->num_clk, link->clocks);
if (rc)
- return -ENODEV;
+ return rc;
- ctrl_private->pixel_clk = devm_clk_get(dev, "stream_pixel");
- if (IS_ERR(ctrl_private->pixel_clk))
- return PTR_ERR(ctrl_private->pixel_clk);
+ ctrl->pixel_clk = devm_clk_get(dev, "stream_pixel");
+ if (IS_ERR(ctrl->pixel_clk))
+ return PTR_ERR(ctrl->pixel_clk);
return 0;
}