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path: root/arch/arm64/include/asm/cpu.h
AgeCommit message (Expand)Author
2022-06-23arm64/sme: Expose SMIDR through sysfsMark Brown
2022-04-22arm64/sme: Identify supported SME vector lengths at bootMark Brown
2022-04-22arm64/sme: Basic enumeration supportMark Brown
2021-12-13arm64: add ID_AA64ISAR2_EL1 sys registerJoey Gouly
2021-06-11arm64: cpuinfo: Split AArch32 registers out into a separate structWill Deacon
2021-05-26arm64: Check if GMID_EL1.BS is the same on all CPUsCatalin Marinas
2021-05-26arm64: Change the cpuinfo_arm64 member type for some sysregs to u64Catalin Marinas
2020-05-21arm64/cpuinfo: Add ID_MMFR4_EL1 into the cpuinfo_arm64 contextAnshuman Khandual
2020-05-21arm64/cpufeature: Introduce ID_MMFR5 CPU registerAnshuman Khandual
2020-05-21arm64/cpufeature: Introduce ID_DFR1 CPU registerAnshuman Khandual
2020-05-21arm64/cpufeature: Introduce ID_PFR2 CPU registerAnshuman Khandual
2020-01-15arm64: Introduce ID_ISAR6 CPU registerAnshuman Khandual
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner
2017-11-03arm64/sve: Probe SVE capabilities and usable vector lengthsDave Martin
2016-07-12arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfsSteve Capper
2016-02-18arm64: add ARMv8.2 id_aa64mmfr2 boiler plateJames Morse
2015-10-21arm64: Consolidate CPU Sanity check to CPU Feature infrastructureSuzuki K. Poulose
2015-10-21arm64: Keep track of CPU feature registersSuzuki K. Poulose
2015-10-21arm64: Move mixed endian support detectionSuzuki K. Poulose
2015-01-07arm64: sanity checks: add missing AArch32 registersMark Rutland
2014-11-25arm64: sanity checks: add ID_AA64DFR{0,1}_EL1Mark Rutland
2014-07-18arm64: cpuinfo: record cpu system register valuesMark Rutland
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