| Age | Commit message (Expand) | Author |
|---|
| 2018-11-01 | RISC-V: refresh defconfig | Anup Patel |
| 2018-10-31 | Merge tag 'riscv-for-linus-4.20-mw2' of git://git.kernel.org/pub/scm/linux/ke... | Linus Torvalds |
| 2018-10-31 | lib: Remove umoddi3 and udivmoddi4 | Palmer Dabbelt |
| 2018-10-31 | Move EM_RISCV into elf-em.h | Palmer Dabbelt |
| 2018-10-31 | RISC-V: properly determine hardware caps | Andreas Schwab |
| 2018-10-31 | Revert "RISC-V: Select GENERIC_LIB_UMODDI3 on RV32" | Palmer Dabbelt |
| 2018-10-31 | mm: remove include/linux/bootmem.h | Mike Rapoport |
| 2018-10-31 | memblock: rename free_all_bootmem to memblock_free_all | Mike Rapoport |
| 2018-10-31 | mm: remove CONFIG_HAVE_MEMBLOCK | Mike Rapoport |
| 2018-10-31 | mm: remove CONFIG_NO_BOOTMEM | Mike Rapoport |
| 2018-10-31 | treewide: remove current_text_addr | Nick Desaulniers |
| 2018-10-25 | Merge tag 'riscv-for-linus-4.20-mw0' of git://git.kernel.org/pub/scm/linux/ke... | Linus Torvalds |
| 2018-10-25 | Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/ke... | Linus Torvalds |
| 2018-10-24 | Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git... | Linus Torvalds |
| 2018-10-22 | RISC-V: SMP cleanup and new features | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Fix some RV32 bugs and build failures | Palmer Dabbelt |
| 2018-10-22 | riscv: Add support to no-FPU systems | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Cosmetic menuconfig changes | Nick Kossifidis |
| 2018-10-22 | riscv: move GCC version check for ARCH_SUPPORTS_INT128 to Kconfig | Masahiro Yamada |
| 2018-10-22 | RISC-V: remove the unused return_to_handler export | Christoph Hellwig |
| 2018-10-22 | RISC-V: Add futex support. | Jim Wilson |
| 2018-10-22 | RISC-V: Add FP register ptrace support for gdb. | Jim Wilson |
| 2018-10-22 | RISC-V: Mask out the F extension on systems without D | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Show IPI stats | Anup Patel |
| 2018-10-22 | RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo | Anup Patel |
| 2018-10-22 | RISC-V: Use Linux logical CPU number instead of hartid | Atish Patra |
| 2018-10-22 | RISC-V: Add logical CPU indexing for RISC-V | Atish Patra |
| 2018-10-22 | RISC-V: Use WRITE_ONCE instead of direct access | Atish Patra |
| 2018-10-22 | RISC-V: Use mmgrab() | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Provide a cleaner raw_smp_processor_id() | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Disable preemption before enabling interrupts | Atish Patra |
| 2018-10-22 | RISC-V: Comment on the TLB flush in smp_callin() | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Filter ISA and MMU values in cpuinfo | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} | Palmer Dabbelt |
| 2018-10-22 | RISC-V: No need to pass scause as arg to do_IRQ() | Anup Patel |
| 2018-10-22 | RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t in ioremap | Vincent Chen |
| 2018-10-22 | RISC-V: Select GENERIC_LIB_UMODDI3 on RV32 | Zong Li |
| 2018-10-22 | RISC-V: Use swiotlb on RV64 only | Zong Li |
| 2018-10-22 | RISC-V: Build tishift only on 64-bit | Zong Li |
| 2018-10-22 | Auto-detect whether a FPU exists | Alan Kao |
| 2018-10-22 | Allow to disable FPU support | Alan Kao |
| 2018-10-22 | Cleanup ISA string setting | Alan Kao |
| 2018-10-22 | Refactor FPU code in signal setup/return procedures | Alan Kao |
| 2018-10-22 | Extract FPU context operations from entry.S | Alan Kao |
| 2018-10-03 | signal: Remove the need for __ARCH_SI_PREABLE_SIZE and SI_PAD_SIZE | Eric W. Biederman |
| 2018-10-02 | RISCV: Fix end PFN for low memory | Atish Patra |
| 2018-09-24 | RISC-V: include linux/ftrace.h in asm-prototypes.h | James Cowgill |
