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path: root/arch/x86/kernel/cpu/cacheinfo.c
AgeCommit message (Expand)Author
2023-02-11x86/cacheinfo: Remove unused trace variableBorislav Petkov (AMD)
2022-11-10x86/cacheinfo: Switch cache_ap_init() to hotplug callbackJuergen Gross
2022-11-10x86: Decouple PAT and MTRR handlingJuergen Gross
2022-11-10x86/mtrr: Add a stop_machine() handler calling only cache_cpu_init()Juergen Gross
2022-11-10x86/mtrr: Let cache_aps_delayed_init replace mtrr_aps_delayed_initJuergen Gross
2022-11-10x86/mtrr: Disentangle MTRR init from PAT initJuergen Gross
2022-11-10x86/mtrr: Move cache control code to cacheinfo.cJuergen Gross
2022-11-10x86/mtrr: Replace use_intel() with a local flagJuergen Gross
2022-07-17x86/cacheinfo: move shared cache map definitionsSander Vanheule
2021-10-15sched: Add cluster scheduler level for x86Tim Chen
2021-09-01drivers: base: cacheinfo: Get rid of DEFINE_SMP_CALL_CACHE_FUNCTION()Thomas Gleixner
2021-04-07x86/cacheinfo: Remove unneeded dead-store initializationYang Li
2020-11-19x86/CPU/AMD: Remove amd_get_nb_id()Yazen Ghannam
2020-11-19x86/CPU/AMD: Save AMD NodeId as cpu_die_idYazen Ghannam
2020-08-23treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva
2019-06-19x86/cacheinfo: Fix a -Wtype-limits warningQian Cai
2019-01-26x86/kernel: Mark expected switch-case fall-throughsGustavo A. R. Silva
2018-12-08x86/kernel: Fix more -Wmissing-prototypes warningsBorislav Petkov
2018-09-27x86/cpu: Get cache info and setup cache cpumap for Hygon DhyanaPu Wen
2018-06-22x86/CPU/AMD: Fix LLC ID bit-shift calculationSuravee Suthikulpanit
2018-05-13x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo()David Wang
2018-05-13x86/CPU: Move cpu local function declarations to local headerThomas Gleixner
2018-05-06x86/CPU/AMD: Calculate last level cache ID from number of sharing threadsSuravee Suthikulpanit
2018-05-06x86/CPU: Rename intel_cacheinfo.c to cacheinfo.cBorislav Petkov
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