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path: root/drivers/char/hw_random/Kconfig
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2024-11-15hwrng: amd - remove reference to removed PPC_MAPLE configLukas Bulwahn
Commit 62f8f307c80e ("powerpc/64: Remove maple platform") removes the PPC_MAPLE config as a consequence of the platform’s removal. The config definition of HW_RANDOM_AMD refers to this removed config option in its dependencies. Remove the reference to the removed config option. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com> Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-11-10hwrng: bcm74110 - Add Broadcom BCM74110 RNG driverMarkus Mayer
Add a driver for the random number generator present on the Broadcom BCM74110 SoC. Signed-off-by: Markus Mayer <mmayer@broadcom.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-10-28hwrng: airoha - add support for Airoha EN7581 TRNGChristian Marangi
Add support for Airoha TRNG. The Airoha SoC provide a True RNG module that can output 4 bytes of raw data at times. The module makes use of various noise source to provide True Random Number Generation. On probe the module is reset to operate Health Test and verify correct execution of it. The module can also provide DRBG function but the execution mode is mutually exclusive, running as TRNG doesn't permit to also run it as DRBG. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-10-05hwrng: iproc-r200 - enable on BCMBCALinus Walleij
The Broadcom Broadband Access (BCA) SoC:s include the iproc r200 hwrng so enable it to be selected for these platforms. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-08-10hwrng: rockchip - add hwrng driver for Rockchip RK3568 SoCAurelien Jarno
Rockchip SoCs used to have a random number generator as part of their crypto device, and support for it has to be added to the corresponding driver. However newer Rockchip SoCs like the RK3568 have an independent True Random Number Generator device. This patch adds a driver for it, greatly inspired from the downstream driver. The TRNG device does not seem to have a signal conditionner and the FIPS 140-2 test returns a lot of failures. They can be reduced by increasing RK_RNG_SAMPLE_CNT, in a tradeoff between quality and speed. This value has been adjusted to get ~90% of successes and the quality value has been set accordingly. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> [daniel@makrotpia.org: code style fixes] Signed-off-by: Daniel Golle <daniel@makrotopia.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-08-10hwrng: cn10k - Enable by default CN10K driver if Thunder SoC is enabledFrancesco Dolcini
Before commit addea5858b66 ("hwrng: Kconfig - Do not enable by default CN10K driver") the Marvell CN10K Random Number Generator was always enabled when HW_RANDOM was enabled. This was changed with that commit to prevent having this driver being always enabled on arm64. To prevent introducing regression with some old defconfig enable the driver when ARCH_THUNDER is enabled. Fixes: addea5858b66 ("hwrng: Kconfig - Do not enable by default CN10K driver") Closes: https://lore.kernel.org/all/SN7PR18MB53144B37B82ADEEC5D35AE0CE3AC2@SN7PR18MB5314.namprd18.prod.outlook.com/ Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-07-13hwrng: Kconfig - Do not enable by default CN10K driverFrancesco Dolcini
Do not enable by default the CN10K HW random generator driver. CN10K Random Number Generator is available only on some specific Marvell SoCs, however the driver is in practice enabled by default on all arm64 configs. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-09-11arch: Remove Itanium (IA-64) architectureArd Biesheuvel
The Itanium architecture is obsolete, and an informal survey [0] reveals that any residual use of Itanium hardware in production is mostly HP-UX or OpenVMS based. The use of Linux on Itanium appears to be limited to enthusiasts that occasionally boot a fresh Linux kernel to see whether things are still working as intended, and perhaps to churn out some distro packages that are rarely used in practice. None of the original companies behind Itanium still produce or support any hardware or software for the architecture, and it is listed as 'Orphaned' in the MAINTAINERS file, as apparently, none of the engineers that contributed on behalf of those companies (nor anyone else, for that matter) have been willing to support or maintain the architecture upstream or even be responsible for applying the odd fix. The Intel firmware team removed all IA-64 support from the Tianocore/EDK2 reference implementation of EFI in 2018. (Itanium is the original architecture for which EFI was developed, and the way Linux supports it deviates significantly from other architectures.) Some distros, such as Debian and Gentoo, still maintain [unofficial] ia64 ports, but many have dropped support years ago. While the argument is being made [1] that there is a 'for the common good' angle to being able to build and run existing projects such as the Grid Community Toolkit [2] on Itanium for interoperability testing, the fact remains that none of those projects are known to be deployed on Linux/ia64, and very few people actually have access to such a system in the first place. Even if there were ways imaginable in which Linux/ia64 could be put to good use today, what matters is whether anyone is actually doing that, and this does not appear to be the case. There are no emulators widely available, and so boot testing Itanium is generally infeasible for ordinary contributors. GCC still supports IA-64 but its compile farm [3] no longer has any IA-64 machines. GLIBC would like to get rid of IA-64 [4] too because it would permit some overdue code cleanups. In summary, the benefits to the ecosystem of having IA-64 be part of it are mostly theoretical, whereas the maintenance overhead of keeping it supported is real. So let's rip off the band aid, and remove the IA-64 arch code entirely. This follows the timeline proposed by the Debian/ia64 maintainer [5], which removes support in a controlled manner, leaving IA-64 in a known good state in the most recent LTS release. Other projects will follow once the kernel support is removed. [0] https://lore.kernel.org/all/CAMj1kXFCMh_578jniKpUtx_j8ByHnt=s7S+yQ+vGbKt9ud7+kQ@mail.gmail.com/ [1] https://lore.kernel.org/all/0075883c-7c51-00f5-2c2d-5119c1820410@web.de/ [2] https://gridcf.org/gct-docs/latest/index.html [3] https://cfarm.tetaneutral.net/machines/list/ [4] https://lore.kernel.org/all/87bkiilpc4.fsf@mid.deneb.enyo.de/ [5] https://lore.kernel.org/all/ff58a3e76e5102c94bb5946d99187b358def688a.camel@physik.fu-berlin.de/ Acked-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2023-08-04hwrng: Enable COMPILE_TEST for more driversRob Herring
There's quite a few hwrng drivers which are easily enabled for COMPILE_TEST, so let's enable them. The dependency on HW_RANDOM is redundant, so drop that while we're here. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22hwrng: ingenic - enable compile testingMartin Kaiser
Enable compile testing for the ingenic-trng driver. Remove the dependency on HW_RANDOM. The ingenic-trng config section is under "if HW_RANDOM". Signed-off-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-20hwrng: pic32 - enable compile-testingMartin Kaiser
Enable compile testing for the pic32 driver. Remove the dependency on HW_RANDOM. The pic32 config section is under "if HW_RANDOM". Signed-off-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-06-23hwrng: st - support compile-testingMartin Kaiser
Allow compile-testing the st-rng driver if we're not running on an ST chipset. Signed-off-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-05-12hwrng: histb - Move driver to drivers/char/hw_random/histb-rng.cDavid Yang
Move to drivers/char/hw_random since histb-(t)rng does not provide cryptography pseudo rng. histb-rng is pretty like hisi-rng, but after investigation, we confirm there is no RNG_PHY_SEED register on histb-rng so a separate driver is needed. Still we rename relevant function names to match those in hisi-rng. Link: https://lore.kernel.org/r/20230401164448.1393336-1-mmyangfl@gmail.com Signed-off-by: David Yang <mmyangfl@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-05-12hwrng: Kconfig - Add HAS_IOMEM dependencies for exynos/meson/mtk/npcmHerbert Xu
Add missing dependencies on HAS_IOMEM as otherwise they will trigger failed builds with COMPILE_TEST enabled. Also add dependencies on OF where appropriate. Change the default so that these drivers are not enabled just because COMPILE_TEST is turned on. Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/oe-kbuild-all/202304191106.swKbBeDh-lkp@intel.com/ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Łukasz Stelmach <l.stelmach@samsung.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-02-03hwrng: starfive - Enable compile testingHerbert Xu
Enable compile testing for jh7110. Also remove the dependency on HW_RANDOM. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Jia Jie Ho <jiajie.ho@starfivetech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-01-27hwrng: starfive - Add TRNG driver for StarFive SoCJia Jie Ho
This adds driver support for the hardware random number generator in Starfive SoCs and adds StarFive TRNG entry to MAINTAINERS. Co-developed-by: Jenny Zhang <jenny.zhang@starfivetech.com> Signed-off-by: Jenny Zhang <jenny.zhang@starfivetech.com> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-10hwrng: bcm2835: bcmbca: Replace ARCH_BCM_63XX with ARCH_BCMBCAWilliam Zhang
Prepare for the BCM63138 ARCH_BCM_63XX migration to ARCH_BCMBCA. Make HW_RANDOM_BCM2835 depending on ARCH_BCMBCA. Signed-off-by: William Zhang <william.zhang@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-05-06hwrng: cn10k - Enable compile testingHerbert Xu
This patch enables COMPILE_TEST for cn10k. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-04-26Revert "hwrng: mpfs - Enable COMPILE_TEST"Herbert Xu
This reverts commit 6a71277ce91e4766ebe9a5f6725089c80d043ba2. The underlying option POLARFIRE_SOC_SYS_CTRL already supports COMPILE_TEST so there is no need for this. What's more, if we force this option on without the underlying option it fails to build. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-04-21hwrng: mpfs - Enable COMPILE_TESTHerbert Xu
The dependency on HW_RANDOM is redundant so this patch removes it. As this driver seems to cross-compile just fine we could also enable COMPILE_TEST. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Reviewed-by: Conor Dooley <conor.dooley@microchip.com Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-04-15hwrng: mpfs - add polarfire soc hwrng supportConor Dooley
Add a driver to access the hardware random number generator on the Polarfire SoC. The hwrng can only be accessed via the system controller, so use the mailbox interface the system controller exposes to access the hwrng. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-01-31hwrng: cavium - HW_RANDOM_CAVIUM should depend on ARCH_THUNDERGeert Uytterhoeven
The Cavium ThunderX Random Number Generator is only present on Cavium ThunderX SoCs, and not available as an independent PCIe endpoint. Hence add a dependency on ARCH_THUNDER, to prevent asking the user about this driver when configuring a kernel without Cavium Thunder SoC support. Fixes: cc2f1908c6b8f625 ("hwrng: cavium - Add Cavium HWRNG driver for ThunderX SoC.") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-01-14Merge tag 'mips_5.17' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - add support for more BCM47XX based devices - add MIPS support for brcmstb PCIe controller - add Loongson 2K1000 reset driver - remove board support for rbtx4938/rbtx4939 - remove support for TX4939 SoCs - fixes and cleanups * tag 'mips_5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (59 commits) MIPS: ath79: drop _machine_restart again PCI: brcmstb: Augment driver for MIPs SOCs MIPS: bmips: Remove obsolete DMA mapping support MIPS: bmips: Add support PCIe controller device nodes dt-bindings: PCI: Add compatible string for Brcmstb 74[23]5 MIPs SOCs MIPS: compressed: Fix build with ZSTD compression MIPS: BCM47XX: Add support for Netgear WN2500RP v1 & v2 MIPS: BCM47XX: Add support for Netgear R6300 v1 MIPS: BCM47XX: Add LEDs and buttons for Asus RTN-10U MIPS: BCM47XX: Add board entry for Linksys WRT320N v1 MIPS: BCM47XX: Define Linksys WRT310N V2 buttons MIPS: Remove duplicated include in local.h MIPS: retire "asm/llsc.h" MIPS: rework local_t operation on MIPS64 MIPS: fix local_{add,sub}_return on MIPS64 mips/pci: remove redundant ret variable MIPS: Loongson64: Add missing of_node_put() in ls2k_reset_init() MIPS: new Kconfig option ZBOOT_LOAD_ADDRESS MIPS: enable both vmlinux.gz.itb and vmlinuz for generic MIPS: signal: Return immediately if call fails ...
2022-01-02MIPS: TXX9: Remove TX4939 SoC supportThomas Bogendoerfer
After removal of RBTX4939 board support remove code for the TX4939 SoC. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-12-24hwrng: cn10k - Add random number generator supportSunil Goutham
CN10K series of silicons support true random number generators. This patch adds support for the same. Also supports entropy health status checking. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com> Signed-off-by: Joseph Longever <jlongever@marvell.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-11-20hwrng: cavium - Check health status while reading random dataSunil Goutham
This RNG device is present on Marvell OcteonTx2 silicons as well and also provides entropy health status. HW continuously checks health condition of entropy and reports faults. Fault is in terms of co-processor cycles since last fault detected. This doesn't get cleared and only updated when new fault is detected. Also there are chances of detecting false positives. So to detect a entropy failure SW has to check if failures are persistent ie cycles elapsed is frequently updated by HW. This patch adds support to detect health failures using below algo. 1. Consider any fault detected before 10ms as a false positive and ignore. 10ms is chosen randomly, no significance. 2. Upon first failure detection make a note of cycles elapsed and when this error happened in realtime (cntvct). 3. Upon subsequent failure, check if this is new or a old one by comparing current cycles with the ones since last failure. cycles or time since last failure is calculated using cycles and time info captured at (2). HEALTH_CHECK status register is not available to VF, hence had to map PF registers. Also since cycles are in terms of co-processor cycles, had to retrieve co-processor clock rate from RST device. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-09-17hwrng: Kconfig - Add helper dependency on COMPILE_TESTCai Huoqing
it's helpful to do a complie test in other platform(e.g.X86) Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-08-06hwrng: Add Arm SMCCC TRNG based driverAndre Przywara
The "Arm True Random Number Generator Firmware Interface"[1] provides an SMCCC based interface to a true hardware random number generator. So far we are using that in arch_get_random_seed(), but it might be useful to expose the entropy through the /dev/hwrng device as well. This allows to assess the quality of the implementation, by using "rngtest" from the rng-tools package, for example. Add a simple platform driver implementing the hw_random interface. The corresponding platform device is created by the SMCCC core code, we just match it here by name and provide a module alias. Since the firmware takes care about serialisation, this can happily coexist with the arch_get_random_seed() bits. [1] https://developer.arm.com/documentation/den0098/latest/ Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-07-10Merge tag 'arm-soc-5.14' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC updates from Olof Johansson: "A few SoC (code) changes have queued up this cycle, mostly for minor changes and some refactoring and cleanup of legacy platforms. This branch also contains a few of the fixes that weren't sent in by the end of the release (all fairly minor). - Adding an additional maintainer for the TEE subsystem (Sumit Garg) - Quite a significant modernization of the IXP4xx platforms by Linus Walleij, revisiting with a new PCI host driver/binding, removing legacy mach/* include dependencies and moving platform detection/config to drivers/soc. Also some updates/cleanup of platform data. - Core power domain support for Tegra platforms, and some improvements in build test coverage by adding stubs for compile test targets. - A handful of updates to i.MX platforms, adding legacy (non-PSCI) SMP support on i.MX7D, SoC ID setup for i.MX50, removal of platform data and board fixups for iMX6/7. ... and a few smaller changes and fixes for Samsung, OMAP, Allwinner, Rockchip" * tag 'arm-soc-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (53 commits) MAINTAINERS: Add myself as TEE subsystem reviewer ixp4xx: fix spelling mistake in Kconfig "Devce" -> "Device" hw_random: ixp4xx: Add OF support hw_random: ixp4xx: Add DT bindings hw_random: ixp4xx: Turn into a module hw_random: ixp4xx: Use SPDX license tag hw_random: ixp4xx: enable compile-testing pata: ixp4xx: split platform data to its own header soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.h PCI: ixp4xx: Add a new driver for IXP4xx PCI: ixp4xx: Add device tree bindings for IXP4xx ARM/ixp4xx: Make NEED_MACH_IO_H optional ARM/ixp4xx: Move the virtual IObases MAINTAINERS: ARM/MStar/Sigmastar SoCs: Add a link to the MStar tree ARM: debug: add UART early console support for MSTAR SoCs ARM: dts: ux500: Fix LED probing ARM: imx: add smp support for imx7d ARM: imx6q: drop of_platform_default_populate() from init_machine arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit address memory soc/tegra: fuse: Fix Tegra234-only builds ...
2021-06-17hw_random: ixp4xx: enable compile-testingArnd Bergmann
The driver is almost portable already, it just needs to include the new header for the cpu definition. Cc: Deepak Saxena <dsaxena@plexity.net> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-28hwrng: Kconfig - Remove leading spacesJuerg Haefliger
Remove leading spaces before tabs in Kconfig file(s) by running the following command: $ find drivers/char/hw_random -name 'Kconfig*' | x\ args sed -r -i 's/^[ ]+\t/\t/' Signed-off-by: Juerg Haefliger <juergh@canonical.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-05-23hwrng: omap - Enable driver for TI K3 familySuman Anna
The TI K3 family of SoCs have a SA2UL IP that contains a SafeXcel IP-76 RNG block which is supported by the OMAP RNG driver. Allow this driver to be built for TI K3 family as well. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Tero Kristo <kristo@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-12-17Merge tag 'for-linus-5.11-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml Pull UML updates from Richard Weinberger: - IRQ handling cleanups - Support for suspend - Various fixes for UML specific drivers: ubd, vector, xterm * tag 'for-linus-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml: (32 commits) um: Fix build w/o CONFIG_PM_SLEEP um: time-travel: Correct time event IRQ delivery um: irq/sigio: Support suspend/resume handling of workaround IRQs um: time-travel: Actually apply "free-until" optimisation um: chan_xterm: Fix fd leak um: tty: Fix handling of close in tty lines um: Monitor error events in IRQ controller um: allocate a guard page to helper threads um: support some of ARCH_HAS_SET_MEMORY um: time-travel: avoid multiple identical propagations um: Fetch registers only for signals which need them um: Support suspend to RAM um: Allow PM with suspend-to-idle um: time: Fix read_persistent_clock64() in time-travel um: Simplify os_idle_sleep() and sleep longer um: Simplify IRQ handling code um: Remove IRQ_NONE type um: irq: Reduce irq_reg allocation um: irq: Clean up and rename struct irq_fd um: Clean up alarm IRQ chip name ...
2020-12-13um: random: Register random as hwrng-core deviceChristopher Obbard
The UML random driver creates a dummy device under the guest, /dev/hw_random. When this file is read from the guest, the driver reads from the host machine's /dev/random, in-turn reading from the host kernel's entropy pool. This entropy pool could have been filled by a hardware random number generator or just the host kernel's internal software entropy generator. Currently the driver does not fill the guests kernel entropy pool, this requires a userspace tool running inside the guest (like rng-tools) to read from the dummy device provided by this driver, which then would fill the guest's internal entropy pool. This all seems quite pointless when we are already reading from an entropy pool, so this patch aims to register the device as a hwrng device using the hwrng-core framework. This not only improves and cleans up the driver, but also fills the guest's entropy pool without having to resort to using extra userspace tools in the guest. This is typically a nuisance when booting a guest: the random pool takes a long time (~200s) to build up enough entropy since the dummy hwrng is not used to fill the guest's pool. This port was originally attempted by Alexander Neville "dark" (in CC, discussion in Link), but the conversation there stalled since the handling of -EAGAIN errors were no removed and longer handled by the driver. This patch attempts to use the existing method of error handling but utilises the new hwrng core. The issue can be noticed when booting a UML guest: [ 2.560000] random: fast init done [ 214.000000] random: crng init done With the patch applied, filling the pool becomes a lot quicker: [ 2.560000] random: fast init done [ 12.000000] random: crng init done Cc: Alexander Neville <dark@volatile.bz> Link: https://lore.kernel.org/lkml/20190828204609.02a7ff70@TheDarkness/ Link: https://lore.kernel.org/lkml/20190829135001.6a5ff940@TheDarkness.local/ Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Acked-by: Anton Ivanov <anton.ivanov@cambridgegreys.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-12-04hwrng: ks-sa - Add dependency on IOMEM and OFHerbert Xu
This patch adds a dependency for KEYSTONE on HAS_IOMEM and OF to prevent COMPILE_TEST build failures. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-27hwrng: hisi - remove HiSilicon TRNG driverWeili Qian
Driver of HiSilicon true random number generator(TRNG) is removed from 'drivers/char/hw_random'. Both 'Kunpeng 920' and 'Kunpeng 930' chips have TRNG, however, PRNG is only supported by 'Kunpeng 930'. So, this driver is moved to 'drivers/crypto/hisilicon/trng/' in the next to enable the two's TRNG better. Signed-off-by: Weili Qian <qianweili@huawei.com> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-09-25hwrng: ingenic - Add hardware TRNG for Ingenic X1830周琰杰 (Zhou Yanjie)
Add X1830 SoC digital true random number generator driver. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Co-developed-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com> Signed-off-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-09-11hwrng: xiphera-trng: add support for XIP8001B hwrngAtte Tommiska
Xiphera XIP8001B is an FPGA-based True Random Number Generator Intellectual Property (IP) Core which can be instantiated in multiple FPGA families. This driver adds Linux support for it through the hwrng interface. Signed-off-by: Atte Tommiska <atte.tommiska@xiphera.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-07-31crypto: ingenic - Add hardware RNG for Ingenic JZ4780 and X1000周琰杰 (Zhou Yanjie)
Add JZ4780 SoC and X1000 SoC random number generator driver, based on PrasannaKumar Muralidharan's JZ4780 RNG driver. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Tested-by: Mathieu Malaterre <malat@debian.org> Suggested-by: Jeffrey Walton <noloader@gmail.com> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-07-23hwrng: imx-rngc - enable driver for i.MX6Horia Geantă
i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block. Since imx-rngc driver supports also rngb, let's enable it for these SoCs too. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Martin Kaiser <martin@kaiser.cx> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-07-09hwrng: ba431 - HW_RANDOM_BA431 should not default to yGeert Uytterhoeven
As HW_RANDOM_BA431 does not have any platform dependency, it should not default to enabled. Fixes: 0289e9be5dc26d84 ("hwrng: ba431 - add support for BA431 hwrng") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-07-09hwrng: ba431 - Add dependency on HAS_IOMEMHerbert Xu
The ba431 driver depends on HAS_IOMEM and this was missing from the Kconfig file. Reported-by: kernel test robot <lkp@intel.com> Fixes: 0289e9be5dc2 ("hwrng: ba431 - add support for BA431 hwrng") Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-06-18hwrng: ba431 - add support for BA431 hwrngOlivier Sobrie
Silex insight BA431 is an IP designed to generate random numbers that can be integrated in various FPGA. This driver adds support for it through the hwrng interface. This driver is used in Silex Insight Viper OEM boards. Signed-off-by: Olivier Sobrie <olivier.sobrie@silexinsight.com> Signed-off-by: Waleed Ziad <waleed94ziad@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-06-14treewide: replace '---help---' in Kconfig files with 'help'Masahiro Yamada
Since commit 84af7a6194e4 ("checkpatch: kconfig: prefer 'help' over '---help---'"), the number of '---help---' has been gradually decreasing, but there are still more than 2400 instances. This commit finishes the conversion. While I touched the lines, I also fixed the indentation. There are a variety of indentation styles found. a) 4 spaces + '---help---' b) 7 spaces + '---help---' c) 8 spaces + '---help---' d) 1 space + 1 tab + '---help---' e) 1 tab + '---help---' (correct indentation) f) 1 tab + 1 space + '---help---' g) 1 tab + 2 spaces + '---help---' In order to convert all of them to 1 tab + 'help', I ran the following commend: $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/' Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-05-08hwrng: cctrng - update help descriptionHadar Gat
Improved the HW_RANDOM_CCTRNG help description. Signed-off-by: Hadar Gat <hadar.gat@arm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-05-08hwrng: cctrng - change default to nHadar Gat
For many users, the Arm CryptoCell HW is not available, so the default for HW_RANDOM_CCTRNG should to n. Remove the line to follow the convention - 'n' is the default anyway so no need to state it explicitly. Signed-off-by: Hadar Gat <hadar.gat@arm.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-05-08hwrng: cctrng - Add dependency on OFHadar Gat
The cctrng is unusable on non-DT systems so we should depend on it. Signed-off-by: Hadar Gat <hadar.gat@arm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-04-22hwrng: cctrng - Add dependency on HAS_IOMEMHerbert Xu
The cctrng doesn't compile without HAS_IOMEM so we should depend on it. Reported-by: kbuild test robot <lkp@intel.com> Fixes: a583ed310bb6 ("hwrng: cctrng - introduce Arm CryptoCell driver") Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Hadar Gat <hadar.gat@arm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-04-16hwrng: cctrng - introduce Arm CryptoCell driverHadar Gat
Introduce low level Arm CryptoCell TRNG HW support. Signed-off-by: Hadar Gat <hadar.gat@arm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-12hwrng: ks-sa - move TI Keystone driver into the config menu structureRandy Dunlap
Move the TI Keystone hardware random number generator into the same menu as all of the other hardware random number generators. This makes the driver config be listed in the correct place in the kconfig tools. Fixes: eb428ee0e3ca ("hwrng: ks-sa - add hw_random driver") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Matt Mackall <mpm@selenic.com> Cc: linux-crypto@vger.kernel.org Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>