Age | Commit message (Expand) | Author |
2021-06-25 | clk: tegra: clk-tegra124-dfll-fcpu: don't use devm functions for regulator | Alexandru Ardelean |
2019-11-11 | clk: tegra: clk-dfll: Add suspend and resume support | Sowjanya Komatineni |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | Thomas Gleixner |
2019-02-18 | clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static | Wei Yongjun |
2019-02-15 | Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi... | Arnd Bergmann |
2019-02-06 | clk: tegra: dfll: add CVB tables for Tegra210 | Joseph Lo |
2019-02-06 | clk: tegra: dfll: CVB calculation alignment with the regulator | Joseph Lo |
2019-02-06 | clk: tegra: dfll: registration for multiple SoCs | Peter De Schrijver |
2019-01-09 | clk: tegra: dfll: Fix a potential Oop in remove() | Dan Carpenter |
2017-11-01 | clk: tegra: dfll: Fix drvdata overwriting issue | Nicolin Chen |
2016-11-10 | clk: tegra: dfll: Use builtin_platform_driver to simplify the code | Wei Yongjun |
2016-11-04 | clk: tegra: make clk-tegra124-dfll-fcpu explicitly non-modular | Paul Gortmaker |
2016-04-28 | clk: tegra: dfll: Reformat CVB frequency table | Thierry Reding |
2016-04-28 | clk: tegra: dfll: Properly clean up on failure and removal | Thierry Reding |
2016-04-28 | clk: tegra: dfll: Make code more comprehensible | Thierry Reding |
2016-04-28 | clk: tegra: dfll: Reference CVB table instead of copying data | Thierry Reding |
2015-07-16 | clk: tegra: Add Tegra124 DFLL clocksource platform driver | Tuomas Tynkkynen |