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Age	Commit message (Expand)	Author
2022-07-25	cxl/region: Add interleave geometry attributes	Ben Widawsky
2022-07-25	cxl/region: Add a 'uuid' attribute	Ben Widawsky
2022-07-21	cxl/region: Add region creation support	Ben Widawsky
2022-07-21	cxl/mem: Enumerate port targets before adding endpoints	Dan Williams
2022-07-21	cxl/port: Move dport tracking to an xarray	Dan Williams
2022-07-21	cxl/port: Move 'cxl_ep' references to an xarray per port	Dan Williams
2022-07-21	cxl/port: Record parent dport when adding ports	Dan Williams
2022-07-21	cxl/port: Record dport in endpoint references	Dan Williams
2022-07-21	cxl/hdm: Track next decoder to allocate	Dan Williams
2022-07-21	cxl/hdm: Add 'mode' attribute to decoder objects	Dan Williams
2022-07-21	cxl/hdm: Enumerate allocated DPA	Dan Williams
2022-07-21	cxl/core: Define a 'struct cxl_endpoint_decoder'	Dan Williams
2022-07-21	cxl/core: Define a 'struct cxl_root_decoder'	Dan Williams
2022-07-21	cxl/core: Define a 'struct cxl_switch_decoder'	Dan Williams
2022-07-19	cxl/port: Read CDAT table	Ira Weiny
2022-07-11	cxl/pmem: Delete unused nvdimm attribute	Dan Williams
2022-07-10	cxl/port: Cache CXL host bridge data	Dan Williams
2022-07-09	cxl: Introduce cxl_to_{ways,granularity}	Dan Williams
2022-07-09	cxl/core: Drop is_cxl_decoder()	Dan Williams
2022-07-09	cxl/core: Drop ->platform_res attribute for root decoders	Dan Williams
2022-07-09	cxl/core: Rename ->decoder_range ->hpa_range	Dan Williams
2022-06-21	cxl/core: Use is_endpoint_decoder	Ben Widawsky
2022-04-28	cxl: Drop cxl_device_lock()	Dan Williams
2022-02-08	cxl/core/port: Add endpoint decoders	Ben Widawsky
2022-02-08	cxl/mem: Add the cxl_mem driver	Ben Widawsky
2022-02-08	cxl/core/port: Add switch port enumeration	Dan Williams
2022-02-08	cxl/core/port: Remove @host argument for dport + decoder enumeration	Dan Williams
2022-02-08	cxl/port: Add a driver for 'struct cxl_port' objects	Ben Widawsky
2022-02-08	cxl/core/hdm: Add CXL standard decoder enumeration to the core	Dan Williams
2022-02-08	cxl/core: Generalize dport enumeration in the core	Dan Williams
2022-02-08	cxl/pmem: Introduce a find_cxl_root() helper	Dan Williams
2022-02-08	cxl/port: Introduce cxl_port_to_pci_bus()	Dan Williams
2022-02-08	cxl/core/port: Use dedicated lock for decoder target list	Dan Williams
2022-02-08	cxl: Prove CXL locking	Dan Williams
2022-02-08	cxl/core: Track port depth	Ben Widawsky
2022-02-08	cxl/core/port: Clarify decoder creation	Ben Widawsky
2022-02-08	cxl/core: Convert decoder range to resource	Ben Widawsky
2022-02-08	cxl: Introduce module_cxl_driver	Ben Widawsky
2022-02-08	cxl/acpi: Map component registers for Root Ports	Ben Widawsky
2022-01-04	cxl/core: Remove cxld_const_init in cxl_decoder_alloc()	Nathan Chancellor
2021-11-15	cxl/pmem: Fix module reload vs workqueue state	Dan Williams
2021-11-08	Merge tag 'cxl-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...	Linus Torvalds
2021-10-29	cxl/pci: Add @base to cxl_register_map	Dan Williams
2021-09-25	cxl/core: Replace unions with struct_group()	Kees Cook
2021-09-21	cxl/core: Split decoder setup into alloc + add	Dan Williams
2021-09-21	tools/testing/cxl: Introduce a mock memory device + driver	Dan Williams
2021-09-21	cxl/bus: Populate the target list at decoder create	Dan Williams
2021-09-21	tools/testing/cxl: Introduce a mocked-up CXL port hierarchy	Dan Williams
2021-09-21	cxl/pmem: Add support for multiple nvdimm-bridge objects	Dan Williams
2021-08-06	cxl/pci: Simplify register setup	Ben Widawsky