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path: root/drivers/edac/i10nm_base.c
AgeCommit message (Expand)Author
2022-09-23EDAC/i10nm: Print an extra register set of retry_rd_err_logQiuxu Zhuo
2022-09-23EDAC/i10nm: Retrieve and print retry_rd_err_log registers for HBMQiuxu Zhuo
2022-09-08EDAC/i10nm: Add driver decoder for Ice Lake and Tremont CPUsYouquan Song
2022-01-04EDAC/i10nm: Release mdev/mbase when failing to detect HBMQiuxu Zhuo
2021-08-23EDAC/i10nm: Retrieve and print retry_rd_err_log registersYouquan Song
2021-08-23EDAC/i10nm: Fix NVDIMM detectionQiuxu Zhuo
2021-06-17EDAC/Intel: Do not load EDAC driver when running as a guestLuck, Tony
2021-06-17EDAC/i10nm: Add support for high bandwidth memoryQiuxu Zhuo
2021-06-17EDAC/i10nm: Add detection of memory levels for ICX/SPR serversQiuxu Zhuo
2020-11-19EDAC/i10nm: Add Intel Sapphire Rapids server supportQiuxu Zhuo
2020-11-19EDAC/i10nm: Use readl() to access MMIO registersQiuxu Zhuo
2020-06-15EDAC, {skx,i10nm}: Use CPU stepping macro to pass configurationsQiuxu Zhuo
2020-06-01Merge branches 'edac-i10nm' and 'edac-misc' into edac-updates-for-5.8Borislav Petkov
2020-05-19EDAC/skx: Use the mcmtr register to retrieve close_pg/bank_xor_enableQiuxu Zhuo
2020-04-27EDAC/i10nm: Update driver to support different bus number config register off...Qiuxu Zhuo
2020-04-27EDAC, {skx,i10nm}: Make some configurations CPU model specificQiuxu Zhuo
2020-03-24EDAC: Convert to new X86 CPU match macrosThomas Gleixner
2019-11-09EDAC: Replace EDAC_DIMM_PTR() macro with edac_get_dimm() functionRobert Richter
2019-08-28x86/intel: Aggregate microserver namingPeter Zijlstra
2019-06-26EDAC, skx, i10nm: Fix source ID register offsetQiuxu Zhuo
2019-06-26EDAC, i10nm: Check ECC enabling status per channelQiuxu Zhuo
2019-06-20EDAC, i10nm: Add Intel additional Ice-Lake supportQiuxu Zhuo
2019-03-23EDAC, skx, i10nm: Make skx_common.c a pure libraryQiuxu Zhuo
2019-02-02EDAC, i10nm: Add a driver for Intel 10nm server processorsQiuxu Zhuo